EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 342

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EP2AGX190FF35C6N

Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX190FF35C6N

Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

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Manufacturer
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Price
Part Number:
EP2AGX190FF35C6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2AGX190FF35C6N
Manufacturer:
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9–62
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Arria II Security Protection
AES Decryption Block
Arria II device designs are protected from copying, reverse engineering, and
tampering using configuration bitstream encryption.
Security Against Copying
The security key is securely stored in the Arria II device and cannot be read out
through any interface. In addition, as configuration file read-back is not supported in
Arria II devices, your design information cannot be copied.
Security Against Reverse Engineering
Reverse engineering from an encrypted configuration file is very difficult and time
consuming because the Arria II configuration file formats are proprietary and the file
contains millions of bits which require specific decryption. Reverse engineering the
Arria II device is just as difficult because the device is manufactured on the most
advanced 40-nm process technology.
Security Against Tampering
After the Tamper Protection bit is set in the key programming file generated by the
Quartus II software, the Arria II device can only be configured with configuration
files encrypted with the same key. Tampering is prevented using both volatile and
non-volatile keys.
The main purpose of the AES decryption block is to decrypt the configuration
bitstream prior to entering data decompression or configuration.
Prior to receiving encrypted data, you must enter and store the 256-bit security key in
the device. You can choose between a non-volatile security key and a volatile security
key with battery backup.
The security key is scrambled prior to storing it in the key storage to make it more
difficult for anyone to retrieve the stored key using de-capsulation of the device.
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
December 2010 Altera Corporation
Design Security

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