CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 70

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

4.7.7
Table 4-6 details the legacy I/O range for 000h through
4FFh. Each I/O location has a read/write (R/W) capability.
Note the following abbreviations:
---
Yes
WO
RO
70
I/O Addr.
000h
001h
002h
003h
004h
005h
006h
007h
008h
009h
00Ah
00Bh
00Ch
00Dh
00Eh
00Fh
010h-01Fh
020h
021h
022h-03Fh
040h
041h
042h
043h
044h-05Fh
060h
061h
Unknown or can not be determined.
Read and write the register at the indicated
location. No shadow required.
Write only. Value written can not be read back.
Reads do not contain any useful information.
Read only. Writes have no effect.
Legacy I/O Decoding
Function
Slave DMA Address - Channel 0
Slave DMA Counter - Channel 0
Slave DMA Address - Channel 1
Slave DMA Counter - Channel 1
Slave DMA Address - Channel 2
Slave DMA Counter - Channel 2
Slave DMA Address - Channel 3
Slave DMA Counter - Channel 3
Slave DMA Command/Status - Channels [3:0]
Slave DMA Request - Channels [3:0]
Slave DMA Mask - Channels [3:0]
Slave DMA Mode - Channels [3:0]
Slave DMA Clear Pointer - Channels [3:0]
Slave DMA Reset - Channels [3:0]
Slave DMA Reset Mask - Channels [3:0]
Slave DMA General Mask - Channels [3:0]
No Specific Usage
PIC Master - Command/Status
PIC Master - Command/Status
No Specific Usage
PIT – System Timer
PIT – Refresh Timer
PIT – Speaker Timer
PIT – Control
No Specific Usage
Keyboard/Mouse - Data Port
Port B Control
31506B
Table 4-6. Legacy I/O: 000h-4FFh
Shw
Shw@ Reads of the location return a constant or
Shw$
Rec
Size
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
8-bit
---
---
---
AMD Geode™ CS5535 Companion Device Data Book
The value written to the register can not be read
back via the same I/O location. Read back is
accomplished via a “Shadow” register located
in MSR space.
meaningless value.
Reads of the location return a status or some
other meaningful information.
Writes to the location are “recorded” and written
to the LPC. Reads to the location return the
recorded value. The LPC is not read.
Shw@
Shw@
Shw@
Shw@
Shw$
Shw$
Shw$
Shw$
Shw$
Shw$
Shw$
R/W
WO
WO
WO
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
---
---
---
Comment
Reads return value B2h.
Reads return value B2h.
Reads return value B2h.
Reads return value B2h.
Reads return value B2h.
Reads return value B2h.
If KEL Memory Offset 100h[0] = 1
(EmulationEnable bit).
If MSR 5140001Fh[0] = 1 (SNOOP
bit) and KEL Memory Offset 100h[0]
= 0 (EmulationEnable bit).
16-bit values in two transfers.
16-bit values in two transfers.
16-bit values in two transfers.
16-bit values in two transfers.
16-bit values in two transfers.
16-bit values in two transfers.
16-bit values in two transfers.
16-bit values in two transfers.
Reads return value B2h.
Global Concepts and Features