CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 274

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.4.3
6.4.3.1
ATAC I/O Address 00h
Type
Reset Value
6.4.3.2
ATAC I/O Address 02h
Type
Reset Value
274
Bit
7:4
2:1
Bit
MODE
3
0
7
6
7
7
Bus Master 0 Status - Primary (ATAC_BM0_STS_PRIM)
ATAC Native Registers
Bus Master 0 Command - Primary (ATAC_BM0_CMD_PRIM)
Name
RSVD
RWCTL
RSVD
BMCTL
Name
MODE (RO)
D1DMA
D1DMA
R/W
00h
R/W
00h
6
6
31506B
RSVD
Description
Reserved. Set to 0. Return 0 on read.
Read or Write Control. Sets the direction of bus master transfers.
0: PCI reads performed.
1: PCI writes performed.
This bit should not be changed when the bus master is active.
Reserved. Set to 0. Return 0 on read.
Bus Master Control. Controls the state of the bus master.
0: Disable master.
1: Enable master.
Bus master operations can be halted by setting bit 0 to 0. Once an operation has been
halted, it can not be resumed. If bit 0 is set to 0 while a bus master operation is active,
the command is aborted and the data transferred from the drive is discarded. This bit
should be reset after completion of data transfer.
Description
Simplex Mode (Read Only). Can both the primary and secondary channel operate
independently?
0: Yes.
1: No (simplex mode).
Drive 1 DMA Capable. Allows Drive 1 to be capable of DMA transfers.
0: Disable.
1: Enable.
D0DMA
ATAC_BM0_CMD_PRIM Bit Descriptions
5
5
ATAC_BM0_STS_PRIM Bit Descriptions
ATAC_BM0_CMD_PRIM Register Map
ATAC_BM0_STS_PRIM Register Map
4
4
RSVD
RWCTL
3
3
AMD Geode™ CS5535 Companion Device Data Book
BMINT
2
2
ATA-5 Controller Register Descriptions
RSVD
BMERR
1
1
BMSTS
BMCTL
0
0