CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 431

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Direct Memory Access Register Descriptions
6.13.2.17 Master DMA Channel [7:4] Clear Byte Pointer (DMA_CH7:4_CLR_PNTR)
I/O Address
Type
Reset Value
6.13.2.18 Master DMA Channel [7:4] Master Clear (DMA_CH7:4_MSTR_CLR)
I/O Address Offset
Type
Reset Value
6.13.2.19 Master DMA Channel [7:4] Clear Mask (DMA_CH7:4_CLR_MSK)
I/O Address Offset
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
Bit
7:0
Bit
7:0
Bit
7:0
7
7
7
Name
CLR_PNTR
Name
MSTR_CLR
Name
CLR_MSK
0D8h
WO
xxh
0DAh
WO
xxh
0DCh
WO
xxh
6
6
6
DMA_CH7:4_MSTR_CLR Register Descriptions
Description
Clear Pointer. A write with any data (dummy value) resets high/low byte pointer for
Channels [7:4] memory address and terminal count registers.
Description
Master Clear. A write with any data (dummy value) resets the 8237 DMA controller for
Channels [7:4].
Description
Clear Mask. A write with any data (dummy value) clears the mask bits for Channels
[7:4].
DMA Clear Mask Register for Channels 7:4
DMA_CH7:4_MSTR_CLR Bit Descriptions
DMA_CH7:4_CLR_PNTR Bit Descriptions
DMA_CH7:4_CLR_MSK Bit Descriptions
5
5
5
DMA_CH7:4_CLR_PNTR Register Map
CLR_PNTR (DUMMY_VAL)
MSTR_CLR (DUMMY_VAL)
CLR_MSK (DUMMY_VAL)
4
4
4
3
3
3
2
2
2
31506B
1
1
1
0
0
0
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