CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 140

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.12.1.1 UART Mode
UART mode supports serial data communication with a
remote peripheral device using a wired interface. This func-
tional block provides receive and transmit channels that
can operate concurrently in full-duplex mode. This func-
tional block performs all functions required to conduct par-
allel data interchange with the system and composite serial
data exchange with the external data channel.
It performs parallel-to-serial conversion on data characters
received from the processor or a DMA controller, and
serial-to-parallel conversion on data characters received
from the serial interface. Figure 5-35 shows the serial data
stream. A data character contains five to eight data bits. It
is preceded by a START bit and is followed by an optional
PARITY bit and a STOP bit. Data is transferred in Little
Endian order (LSB first).
UART mode can be implemented in standard 16450 and
16550 compatibility (non-extended) and extended mode.
UART 16450 compatibility mode is the default after power-
up or reset. When extended mode is selected, the func-
tional block architecture changes slightly and a variety of
additional features are made available. The interrupt
sources are no longer prioritized, and an Auxiliary Status
and Control Register (ASCR) replaces the Scratch Pad
Register (SPR). The additional features include: transmitter
FIFO (TX_FIFO) thresholding, DMA capability, and inter-
rupts on transmitter empty states and DMA events.
The clock for both transmit and receive channels is pro-
vided by an internal baud generator that divides its input
clock by any divisor value from 1 to 2
frequency of the baud generator must be programmed to
be 16 times the baud rate value. The baud generator input
clock is derived from a 24 MHz clock through a program-
mable prescaler. The prescaler value is determined by the
PRESL bits in the EXCR2 register. Its default value is 13.
This allows all the standard baud rates, up to 115.2 Kbaud,
to be obtained. Smaller prescaler values allow baud rates
up to 921.6 Kbaud (standard) and 1.5 Kbaud (non-stan-
dard).
Before operation can begin, both the communication for-
mat and baud rate must be programmed by the software.
The communication format is programmed by loading a
control byte into the LCR (Link Control Register), while the
baud rate is selected by loading an appropriate value into
the Baud Generator Divisor Register. The software can
read the status of the functional block at any time during
operation. The status information includes Full/Empty
states for both transmit and receive channels, and any
other condition detected on the received data stream, such
as a parity error, framing error, data overrun, or break
event.
140
31506B
START -LSB- DATA[5:8] -MSB- PARITY
Figure 5-35. UART Serial Data Stream Format
16
-1. The output clock
5.12.1.2 Sharp-IR Mode
This mode supports bidirectional data communication with
a remote device, using IR radiation as the transmission
medium. Sharp-IR uses Digital Amplitude Shift Keying
(DASK) and allows serial communication at baud rates up
to 38.4 Kbaud. The format of the serial data is similar to
that of the UART data format. Each data word is sent seri-
ally, beginning with a 0 value START bit, followed by up to
eight data bits (LSB first), an optional parity bit, and ending
with at least one STOP bit, with a binary value of 1. A logi-
cal 0 is signalled by sending a 500 kHz continuous pulse
train of IR radiation. A logical 1 is signalled by the absence
of an IR signal. This functional block can perform the mod-
ulation and demodulation operations internally, or can rely
on the external optical module to perform them.
Sharp-IR device operation is similar to operation in UART
mode. The difference being that data transfer operations
are normally performed in half-duplex fashion, and the
modem control and status signals are not used. Selection
of the Sharp-IR mode is controlled by the Mode Select
(MDSL) bits in the MCR when the functional block is in
extended mode, or by the IR_SL bits in the IRCR1 register
when the functional block is in non-extended mode.) This
prevents legacy software, running in non-extended mode,
from spuriously switching the functional block to UART
mode when the software writes to the MCR.
5.12.1.3 SIR Mode
SIR mode supports bidirectional data communication with
a remote device, using IR radiation as the transmit
medium. SIR allows serial communication at baud rates up
to 115.2 Kbaud. The serial data format is similar to that of
the UART data format. Each data word is sent serially,
beginning with a 0 value START bit, followed by eight data
bits (LSB first), an optional PARITY bit, and ending with at
least one STOP bit, with a binary value of 1. A 0 value is
signalled by sending a single IR pulse. A 1 value is sig-
nalled by the absence of a pulse. The width of each pulse
can be either 1.6 µs (3/16 the time required to transmit a
single bit at 115.2 kbps). This way, each word begins with
a pulse at the START bit.
Operation in SIR is similar to that of the UART mode. The
difference being that data transfer operations are normally
performed in half-duplex fashion. Selection of the IrDA 1.0
SIR mode is controlled by the MDSL bits in the MCR when
the UART is in extended mode, or by the IR_SL bits in the
IRCR1 register when the UART is in non-extended mode.
This prevents legacy software, running in non-extended
mode, from spuriously switching the functional block to
UART mode when the software writes to the MCR.
AMD Geode™ CS5535 Companion Device Data Book
STOP
UART and IR Port