CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 206

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CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
6.1.1.4
MSR Address
Type
Reset Value
The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 0. Reading the FLAG bit returns
the value; writing 1 clears the flag; writing 0 has no effect. (See Section 4.8.4 "MSR Address 3: Error Control" on page 78
for further details.)
206
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:44
42:40
Bit
Bit
43
3
2
1
0
GLD Error MSR (GLIU_GLD_MSR_ERROR)
Name
STATCNT2_
ASMI_EN
STATCNT1_
ASMI_EN
STATCNT0_
ASMI_EN
SSMI_EN
Name
RSVD
DACOMP_
ERR_FLAG
RSVD
51010003h
R/W
00000000_00000001h
31506B
Description
Reserved. Write as read.
Data Comparator Error Flag. If high, records that an ERR was generated due to a Data
Comparator (DA_COMP_VAL_LO / DA_COMP_VAL_HI, MSR 510100D0h / 510100D1h)
event. Write 1 to clear; writing 0 has no effect. DACOMP_ERR_EN (bit 11) must be low to
generate ERR and set flag.
Reserved. Write as read.
GLIU_GLD_MSR_SMI Bit Descriptions (Continued)
Description
Statistic Counter 2 ASMI Enable. Write 0 to enable STATCNT2_ASMI_FLAG (bit 35)
and to allow a Statistic Counter 2 (MSR 510100A8h) event to generate an ASMI.
Statistic Counter 1 ASMI Enable. Write 0 to enable STATCNT1_ASMI_FLAG (bit 34)
and to allow a Statistic Counter 1 (MSR 510100A4h) event to generate an ASMI.
Statistic Counter 0 ASMI Enable. Write 0 to enable STATCNT0_ASMI_FLAG (bit 33)
and to allow a Statistic Counter 0 (MSR 510100A0h) event to generate an ASMI.
SSMI Enable. Write 0 to enable SSMI_FLAG (bit 32) and to allow a received SSMI event
to generate an SSMI. (See bit 32 description for SSMI event sources.)
RSVD
RSVD
GLIU_GLD_MSR_ERROR Bit Descriptions
GLIU_GLD_MSR_ERROR Register Map
AMD Geode™ CS5535 Companion Device Data Book
GeodeLink™ Interface Unit Register Descriptions
RSVD
RSVD
9
8
7
6
5
4
3
2
1
0

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