CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 435

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Low Pin Count Register Descriptions
6.14
The registers for the Low Pin Count (LPC) port are divided
into two sets:
• Standard GeodeLink Device (GLD) MSRs (Shared with
• LPC Specific MSRs
The MSRs are accessed via the RDMSR and WRMSR pro-
cessor instructions. The MSR address is derived from the
perspective of the CPU Core. See Section 4.2 "MSR
Addressing" on page 59 for more details.
6.14.1
The LPC Controller uses the MSR_LPC_EADDR and MSR_LPC_ESTAT to record the indicated information associated
with any given LPC bus error. The recorded information can not be cleared or modified. Simultaneous with this recording,
an error event is sent to the DIVIL GLD_MSR_ERROR (MSR 51400003h). If enabled at the DIVIL GLD_MSR_ERROR, any
LPC error event is recorded with a flag. This flag can be cleared. The status of this flag should be used to determine if there
is an outstanding error associated with the two MSRs below.
6.14.1.1 LPC Address Error (LPC_EADDR)
MSR Address
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
MSR Address
DIVIL, see Section 6.6.1 on page 317.)
5140004Ch
5140004Dh
31:0
5140004Eh
5140004Fh
Bit
Low Pin Count Register Descriptions
LPC Specific MSRs
Name
LPC_ERR_ADDR
Type
R/W
R/W
RO
RO
5140004Ch
RO
00000000h
Register Name
LPC Address Error (LPC_EADDR)
LPC Error Status (LPC_ESTAT)
LPC Serial IRQ Control (LPC_SIRQ)
LPC Reserved (LPC_RSVD)
Description
LPC Error Address. When an error occurs, this register captures the associated 32-bit
address.
Table 6-54. LPC Specific MSRs Summary
LPC_EADDR Bit Descriptions
LPC_EADDR Register Map
LPC_ERR_ADDR
All MSRs are 64 bits, however, the LPC Specific MSRs are
called out as 32 bits. The LPC module treats writes to the
upper 32 bits (i.e., bits [63:32]) of the 64-bit MSRs as don’t
cares and always returns 0 on these bits.
The LPC Specific MSRs are summarized in Table 6-54.
The reference column in the summary table points to the
page where the register maps and bit descriptions are
listed.
9
Reset Value
00000000h
00000000h
00000000h
00000000h
8
31506B
7
6
5
4
3
Reference
Page 435
Page 435
Page 435
Page 435
2
1
435
0