CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 462

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.16.2.12 GPIO/IN_AUX Input Event Count Enable (GPIO[x]_IN_EVNTCNT_EN)
These registers control the enabling of the input event counter function for the low (GPIO[15:0]) and high (GPIO[31:16])
banks of GPIOs. If the feature bit is high, the event counter function is enabled on the input. If the feature bit is low, the
event counter function is disabled on the input. The reset value forces all the filter functions to be disabled. (These registers
use atomic programming, see Section 6.16.1 on page 454 for details.)
When the event counter is enabled, the filter must also be enabled (GPIO I/O Offset 28h/A8h). If no filtering is desired, then
program the GPIO_FILTER[x]_AMOUNT register to 0.
GPIO Low Bank Input Event Count Enable
(GPIOL_IN_EVNTCNT_EN)
GPIO I/O Offset
Type
Reset Value
462
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
2Ch
R/W
FFFF0000h
31506B
GPIOH_IN_EVNTCNT_EN Register Map
GPIOL_IN_EVNTCNT_EN Register Map
GPIO High Bank Input Event Count Enable
(GPIOH_IN_EVNTCNT_EN)
GPIO I/O Offset
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
ACh
R/W
FFFF0000h
GPIO Subsystem Register Descriptions
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0