CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 410

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.12.10 Bank 7 Register Descriptions
The bit formats for the registers in Bank 7 are summarized in Table 6-44. Detailed descriptions of each register follow.
The CEIR utilizes two carrier frequency ranges (See Table 6-50 on page 413):
• Low range - spans from 30 kHz to 56 kHz, in 1 kHz increments.
• High range - includes three frequencies: 400 kHz, 450 kHz or 480 kHz.
High and low frequencies are specified independently to allow separate transmission and reception modulation settings.
The transmitter uses the carrier frequency settings in Table 6-50 "CEIR Carrier Frequency Encoding" on page 413.
The two registers at I/O Offsets 04h and 07h (IR transceiver configuration registers) are provided to configure the virtual IR
dongle interface via IRSL[2:0] bits (to allow legacy software writes on these bits).
6.12.10.1 IR Receiver Demodulator Control Register (IRRXDC)
I/O Offset
Type
Reset Value
IRRXDC controls settings for Sharp-IR and CEIR reception. After reset, the content of this register is 29h. This setting
selects a subcarrier frequency in a range between 34.61 kHz and 38.26 kHz for the CEIR mode, and from 480.0 kHz to
533.3 kHz for the Sharp-IR mode. The value of this register is ignored if the receiver demodulation for both modes is dis-
abled (see bit 7 (SHDM_DS) in Section 6.12.9.1 "IR Control Register 3 (IRCR3)" on page 408 and bit 4 (RCDM_DS) in
Section 6.12.10.3 "CEIR Configuration Register (RCCFG)" on page 414). The available frequency ranges for CEIR and
Sharp-IR modes are given in Tables 6-46 through 6-48.
410
05h-06h RSVD
Offset Name
00h
01h
02h
03h
04h
07h
I/O
Bit
7:5
4:0
7
Register
IRRXDC
IRTXMC
RCCFG
BSR
IRCFG1
IRCFG4
Name
DBW[2:0]
DFR[4:0]
DBW[2:0]
00h
R/W
29h
6
31506B
STRV_MS
R_LEN
BKSE
7
Description
Demodulator Bandwidth. These bits set the demodulator bandwidth for the selected
frequency range. The subcarrier signal frequency must fall within the specified frequency
range in order to be accepted. Used for both Sharp-IR and CEIR modes. (Default = 001.)
Demodulator Frequency. These bits select the subcarrier’s center frequency for the
CEIR mode. (Default = 01001.)
RSVD
MCPW[2:0]
5
DBW[2:0]
RSVD
T_OV
6
Table 6-45. Bank 7 Bit Map
IRRXDC Bit Descriptions
IRRXDC Register Map
SET_IRTX
IRSL0_DS
RXHSC
4
5
RCDM_DS
IRRX1_LV
RXINV
4
3
RSVD
Bits
AMD Geode™ CS5535 Companion Device Data Book
IRSL21_DS
BSR[6:0]
RSVD
RSVD
3
DFR[4:0]
2
UART and IR Port Register Descriptions
MCFR[4:0]
DFR[4:0]
TXHSC
2
1
IRIC[2:0]
RSVD
1
RC_MMD[1:0]
0
0