CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 406
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CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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6.12.6.3 Shadow of FIFO Control Register (SH_FCR)
I/O Offset
Type
Reset Value
This register returns the contents of the FCR in Bank 0.
6.12.6.4 Bank Select Register (BSR)
I/O Offset
Type
Reset Value
BSR is the same as the BSR register at I/O Offset 03h in Bank 0. See Section 6.12.3.4 "Link Control/Bank Select Regis-
ters" on page 390 for bit descriptions.
6.12.7
The bit formats for the registers in Bank 4 are summarized in Table 6-42. Detailed descriptions of each register follow.
6.12.7.1 IR Control Register 1 (IRCR1)
I/O Offset
Type
Reset Value
IRCR1 enables the Sharp-IR or SIR IR mode in non-extended mode of operation. Upon reset, all bits are set to 0.
406
00h-01h
04h-07h
Offset
02h
03h
Bit
7:4
3:2
1:0
I/O
7
7
RXFTH[1:0]
Bank 4 Register Descriptions
Register
Name
IRCR1
BSR
RSVD
RSVD
Name
RSVD
IR_SL[1:0]
RSVD
02h
RO
00h
03h
R/W
00h
02h
R/W
00h
6
6
31506B
RSVD
BKSE
Description
Reserved. Write as 0.
Sharp-IR or SIR Mode Select. These bits enable Sharp-IR and SIR modes in non-
extended mode. They allow selection of the appropriate IR interface when extended
mode is not selected. These bits are ignored when extended mode is selected.
00: UART (Default).
01: Reserved.
10: Sharp-IR.
11: SIR.
Reserved. Write as 0.
7
5
5
TXFTH[1:0]
Table 6-42. Bank 4 Bit Map
6
IRCR1 Bit Descriptions
RSVD
IRCR1 Register Map
FCR Register Map
4
4
5
RSVD
3
3
4
IR_SL[1:0]
AMD Geode™ CS5535 Companion Device Data Book
RSVD
RSVD
Bits
BSR[6:0]
3
TXSR
IR_SL[1:0]
2
2
UART and IR Port Register Descriptions
2
RXSR
1
1
1
RSVD
RSVD
FIFO_EN
0
0
0
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