CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet

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CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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CS5535-UDCF
Manufacturer:
AMD
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CS5535-UDCF
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AMD Geode™ CS5535 Companion
Device Data Book
February 2005
Publication ID: 31506B
AMD Geode™ CS5535 Companion Device Data Book

Related parts for CS5535-UDCF

CS5535-UDCF Summary of contents

Page 1

... AMD Geode™ CS5535 Companion Device Data Book February 2005 Publication ID: 31506B AMD Geode™ CS5535 Companion Device Data Book ...

Page 2

... System Architecture are trademarks of Advanced Micro Devices, Inc. Microsoft is a registered trademark of Microsoft Corporation in the United States and/or other jurisdictions. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 2 AMD Geode™ CS5535 Companion Device Data Book - ...

Page 3

... Typical GeodeLink™ Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4.4 Embedded PCI Adapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 4.5 Clock Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 4.6 Reset Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 4.7 Memory and I/O Map Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 4.8 Standard GeodeLink™ Device MSRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 4.9 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 4.10 Component Revision AMD Geode™ CS5535 Companion Device Data Book 31506B Contents 3 ...

Page 4

... GPIO Subsystem Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 6.17 Multi-Function General Purpose Timer Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . 483 6.18 Power Management Controller Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 494 6.19 Flash Controller Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 519 6.20 GeodeLink™ Control Processor Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531 4 AMD Geode™ CS5535 Companion Device Data Book Contents ...

Page 5

... Power Supply Sequence Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 571 7.5 Low Voltage Detect (LVD) Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572 7.6 Skip Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 573 8.0 Package Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575 Appendix A Support Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577 A.1 Order Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577 A.2 Data Book Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577 AMD Geode™ CS5535 Companion Device Data Book 31506B 5 ...

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... AMD Geode™ CS5535 Companion Device Data Book Contents ...

Page 7

... Simplified GLIU with Generic GeodeLink™ Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Figure 4-2. GeodeLink™ Architecture ASMI and Error Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 4-3. AMD Geode™ CS5535 Companion Device GeodeLink™ Architecture Topology . . . . . . . . 58 Figure 4-4. Typical GeodeLink™ Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 4-5. GeodeLink™ Device With Embedded PCI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 4-6 ...

Page 8

... Figure 7-10. USB Differential Input Sensitivity Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 561 Figure 7-11. LVD Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572 Figure 7-12. Skip Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 573 Figure 8-1. 208-Terminal PBGA Package (Body Size: 23x23x2.13 mm; Pitch: 1.27 mm 575 8 List of Figures AMD Geode™ CS5535 Companion Device Data Book ...

Page 9

... Table 5-21. Real Dongle Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 Table 5-22. Cycle Types Supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 Table 5-23. Cycle Field Definitions: Target Memory, I/O, and DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 Table 5-24. Host Initiated Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 AMD Geode™ CS5535 Companion Device Data Book 31506B List of Tables 9 ...

Page 10

... Table 6-36. Bank 1 Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 398 Table 6-37. Bits Cleared on Fallback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 398 Table 6-38. Baud Generator Divisor Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399 Table 6-39. Bank 2 Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 Table 6-40. DMA Threshold Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402 10 AMD Geode™ CS5535 Companion Device Data Book List of Tables ...

Page 11

... Power Management and Processor Control Timing Parameters . . . . . . . . . . . . . . . . . . . . . 565 Table 7-19. Miscellaneous Signals Except UART Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 566 Table 7-20. UART Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567 Table 7-21. GPIO Signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 568 Table 7-22. MFGPT Signaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 569 AMD Geode™ CS5535 Companion Device Data Book 31506B 11 ...

Page 12

... Table 7-23. JTAG Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 570 Table 7-24. LVD Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572 Table 7-25. Skip Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 573 Table A-1. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577 Table A-2. Edits to Current Revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 578 12 AMD Geode™ CS5535 Companion Device Data Book List of Tables ...

Page 13

... Overview 1.1 General Description The AMD Geode™ CS5535 companion device is designed to work with an integrated processor North Bridge compo- nent such as an AMD Geode™ GX processor (i.e., Geode GX 533@1.1W processor*, Geode GX 500@1.0W proces- sor*, and Geode GX 466@0.9W processor*). Together, the Geode GX processor and Geode CS5535 companion ...

Page 14

... NOR optional execute-in-place boot source NAND optional file system General purpose ISA bus slave-like devices supported with configurable chip selects Hardware support for SmartMedia type ECC (Error Correcting Code) calculation off loading software inten- sive algorithm AMD Geode™ CS5535 Companion Device Data Book Overview ...

Page 15

... ASK-IR option of SHARP-IR — DASK-IR option of SHARP-IR — Consumer Remote Control supports RC-5, RC-6, NEC, RCA, and RECS 80 AMD Geode™ CS5535 Companion Device Data Book 31506B System Management Bus (SMB) Controller: — Compatible with Intel System Management Bus, 2 Phillips I C, and ACCESS ...

Page 16

... Programmable SSMI (synchronous system manage- ment interrupt) generators for selected range of addresses; intended for virtual device emulation (future support, if needed) ATA-5 Controller, GLIU, and Diverse Device are the only SSMI sources AMD Geode™ CS5535 Companion Device Data Book Overview ...

Page 17

... Model Specific Registers (MSRs) that are detailed in Section 4.1.6 "Address Spaces and MSRs" on page 58. As shown in Figure 1-1 on page 13, the Geode CS5535 companion device is implemented with one GeodeLink Interface Unit (GLIU) that connects to the: • GeodeLink PCI South Bridge • ...

Page 18

... The Geode CS5535 companion device also provides a software accessible buffered reset signal to the IDE drive. The IDE_RST# signal is driven low during reset to the Geode CS5535 companion device and can be driven low or high as needed for device-power-off conditions. 2.4 Universal Serial Bus Controllers ...

Page 19

... General Purpose I/Os with Input Conditioning Functions (ICF) There are 32 GPIOs in the Geode CS5535 companion device, 28 are externally available, that offer a variety of user-selectable configurations including accessing auxil- iary functions within the chip, and input conditioning such as debounce and edge detect. Register access is config- ured in such a way as to avoid Read-Modify-Write opera- tions ...

Page 20

... The GPIO subsystem can be configured to transmit any of several wakeup events into the system. The Geode CS5535 companion device is divided into two main power domains: Working and Standby, plus circuits such as the real-time clock and CMOS RAM that are bat- tery-backed ...

Page 21

... Architecture Overview 2.9 Processor Support As previously stated, the Geode CS5535 companion device was designed to interface with the Geode GX pro- cessor. Figure 2-1 and Figure 2-2 on page 22 show typical SDRAM SODIMM CE Optional Cardbus Controller PCI Cardbus PCI1211 Socket TPS2211 PADCard Connector LPC ...

Page 22

... GX Processor 2-Wire I/F PCI Bus AMD Geode™ LPC Bus CS5535 Companion IDE Device USB Power Switch and Over-Current Protection AMD Geode™ CS5535 Companion Device Data Book Architecture Overview CRT RGB Out Digital RGB DSTN or TFT Clocks Headphones AC97 Amp ...

Page 23

... Signal Definitions This section defines the signals and describes the external interface of the AMD Geode™ CS5535 companion device. Signal multiplexing has been utilized to a high degree. For example, the IDE and Flash interfaces are multiplexed on the same balls. Configuration is dependent upon the boot options selected (see Table 3-5 " ...

Page 24

... Debug and GPIO5+MFGPT1_RS+MFGPT0_C1 Manufacturing GPIO6+MFGPT0_RS+MFGPT1_C1+MFGPT2_C2 Interface Signals GPIO27+MFGPT7_C1+32KHZ V Power, CORE V Ground, CORE_VSB V [Total of 14] IO and V IO_VSB No Connects V [Total of 18 [Total of 19] Typical Signal Groups (Continued) AMD Geode™ CS5535 Companion Device Data Book Signal Definitions [Total of 8] [Total of 1] [Total of 1] ...

Page 25

... Signal Definitions 3.1 Ball Assignments As illustrated in Figure 3-1 on page 23, the Geode CS5535 companion device is configurable. Boot options and regis- ter programming are used to set various modes of opera- tion and specific signals on specific balls. This section describes the ball assignments and interface options: • ...

Page 26

... AD18 NC IRDY# DEVSEL# AD23 AD20 AD17 C/BE2# TRDY# STOP# AD22 AD19 AD16 FRAME# PAR C/BE1 AMD Geode™ CS5535 Companion Device Data Book Signal Definitions IDE_A1 IDE_RDY IDE_DQ# IDE_D1 NC IDE_D12 GPIO2 IDE_IOR# IDE_D0 IDE_D14 IDE_D13 IDE_D4 IDE_DK0# IDE_IOW# IDE_D15 IDE_D2 IDE_D3 ...

Page 27

... IO_VSB B7 GPIO26 I/O MFGPT7_RS I B8 RESET_STAND# I Bare_Wire B9 LVD_TEST Wire (O) Bare_Wire B10 IDE_CS0# O FLASH_CS0# O FLASH_CE0# O AMD Geode™ CS5535 Companion Device Data Book Ball Configuration No. Signal Name (Note 1) Q7 B11 IDE_AD2 OUT_AUX1 FLASH_AD27/AD2 OUT_AUX2 B12 GPIO2 --- IDE_IRQ0 B13 IDE_IOR0# BP FLASH_RE# Q7 B14 IDE_DATA0 ...

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... J2 LPC_AD1 BOS[1: GPIO17 IDE BOS[1: GPIO12 BOS[1: AC_S_IN2 IDE BOS[1: SLEEP_Y BOS[1: J14 V SS AMD Geode™ CS5535 Companion Device Data Book Signal Definitions Buffer Type Type (Note 2) Configuration I/O SMB I/O IN_AUX1 and OUT_AUX1 I IN_AUX1 I SMB PWR --- PWR --- O IDE AGND ...

Page 29

... TDI I P2 TDO SUSP# O CIS PWR GND PWR GND PWR CORE AMD Geode™ CS5535 Companion Device Data Book Ball Configuration No. Signal Name (Note 1) --- P10 V CORE P11 V SS PCI Ball Opt MSR P12 P13 V SS Ball Opt MSR P14 V [ P15 ...

Page 30

... NC PCI Note 1. The primary signal name is listed first. Note 2. See Table 3-4 "Buffer Type Characteristics" on page 33 for buffer PCI type definitions. PCI AMD Geode™ CS5535 Companion Device Data Book Signal Definitions Buffer Type Type (Note 2) Configuration --- --- --- --- ...

Page 31

... GPIO9 BOS1 L2 GPIO10 C/BE0# U14 GPIO11 C/BE1# U11 GPIO12 C/BE2# T9 GPIO13 C/BE3# R6 GPIO14 CIS P3 GPIO15 DEVSEL# R11 GPIO16 AMD Geode™ CS5535 Companion Device Data Book 31506B Ball Ball No. Signal Name No. B14 GPIO17 J2 A15 GPIO18 J1 C15 GPIO19 K1 C16 GPIO20 G1 B17 GPIO21 G2 ...

Page 32

... Signal Name No. D4, V (Total of 18) D5, SS D6, D7, D9, D11, D12, D13, D14, E4, F4, E14, F14, G4, M4, J4, M14, L4, P4, N4, P6, N14, P9, P5, P12, P7, P14 P11, P13 B6 AMD Geode™ CS5535 Companion Device Data Book Signal Definitions Ball Signal Name No SS_VBAT1 V B2 SS_VBAT2 WORK_AUX C9 WORKING C5 ...

Page 33

... NA NA AMD Geode™ CS5535 Companion Device Data Book Backdrive Protected: Indicates that the buffer may have active signals applied even when the Geode CS5535 com- panion device is powered down. PU/PD: Indicates if an internal, programmable pull-up or pull-down resistor may be present. Current High/Low (mA): This column gives the current source/sink capacities when the voltage at the pin is high, and low. The high and low values are separated by a “ ...

Page 34

... Specifically, the functions LPC/GPIO and IDE/Flash groups are selected, and certain individual balls, as specified in the MSR, are controlled. Table 3-5. Boot Options Selection AMD Geode™ CS5535 Companion Device Data Book Signal Definitions ...

Page 35

... IDE_IRQ0 is multiplexed with GPIO2; therefore, this bit has no affect with regards to programming IDE_IRQ0. See Table 3-5 "Boot Options Selection" for BOS[1:0] pro- gramming values. AMD Geode™ CS5535 Companion Device Data Book Ball H3 functions as GPIO22 Ball H2 functions as GPIO16 Ball J2 functions as GPIO17 ...

Page 36

... KHZ32_XCI. I Reset Working Power Domain. This signal, when asserted, is the master reset for all Geode CS5535 companion device interfaces that are in the Working power domain. See Section 4.9.1 "Power Domains" on page 80 for a description of the Working power domain. ...

Page 37

... SS_VBAT1 V B2 SS_VBAT2 LVD_EN# C7 AMD Geode™ CS5535 Companion Device Data Book Type Description O Suspend. This signal goes low in response to events as determined by the power management logic. It requests the Geode GX processor to enter the Suspend state. This is the default state for this ball at reset. ...

Page 38

... I/O PCI Cycle Frame. FRAME# is asserted to indicate the start and dura- tion of a transaction de-asserted on the final data phase. FRAME input when the Geode CS5535 companion device is a PCI slave. Normally connected to a 10k to15k Ω external pull-up. This signal is in TRI-STATE mode after reset ...

Page 39

... PCI Target Ready. TRDY# is asserted by a PCI slave to indicate it is ready to complete the current data transfer. TRDY input that indicates a PCI slave has driven valid data on a read or a PCI slave is ready to accept data from the Geode CS5535 companion device on a write. TRDY output that indicates the Geode CS5535 companion device has placed valid data on AD[31:0] during a read or is ready to accept the data from a PCI master on a write ...

Page 40

... This signal resets all the devices that are attached to the IDE interface. O IDE Address Bits. These address bits are used to access a register or data port in a device on the IDE bus. AMD Geode™ CS5535 Companion Device Data Book Signal Definitions Data Phase NAND Flash Mode --- ...

Page 41

... Block registers in IDE Device 1. I DMA Request. The DREQ input is used to request a DMA transfer from the Geode CS5535 companion device. The direction of the trans- fers are determined by the IDE_IOR0# and IDE_IOW0# signals. Note: Ball A14 is the only ball that changes direction from IDE to Flash (input when in IDE mode, output when in Flash mode) ...

Page 42

... This bus is actively driven to zero with or without an LPC_CLK from and after reset. I Ready/Busy#. NAND Flash pulls this signal low to indicate it is busy with an internal operation. No further action is accepted except read status. AMD Geode™ CS5535 Companion Device Data Book Signal Definitions ...

Page 43

... Note 1. Use external 27 Ω series resistor on output. From reset, these outputs are in TRI-STATE. At board level kΩ pull-down resistor is required per the USB specification. Note 2. External clamping diodes may be needed to meet over voltage requirements. AMD Geode™ CS5535 Companion Device Data Book Type Description O USB Power Enable 1 ...

Page 44

... LPC Clock. 33 MHz LPC bus shift clock. I/O LPC Address/Data Bus. This is the 4-bit LPC bus. Address, control, and data are transferred on this bus between the Geode CS5535 com- panion device and LPC devices. An external pull-up of 100 kΩ is required on these balls (if used in LPC mode) to maintain a high level when the signals are in TRI-STATE mode ...

Page 45

... Note 1. All LPC signals, except LPC_CLK are shared on GPIO balls (see Table 3-8 "GPIO Options" on page 47). The Ge- ode CS5535 companion device powers up with this group of balls set to the LPC mode; to use them as GPIOs they must be explicitly reprogrammed. The LPC signals may be switched to GPIOs use via MSR 51400015h (see Sec- tion 6.6.2.11 " ...

Page 46

... AC_CLK. If the codec’s Ready bit is set in this stream (slot 0, bit 15), then it is functionally ORed with AC_S_IN. Connect to a second codec’s serial data output. This function is only available when GPIO12 is programmed to IN_AUX1. See Table 3-8 "GPIO Options" on page 47. AMD Geode™ CS5535 Companion Device Data Book Signal Definitions ...

Page 47

... See Section 6.16.2.5 on page 458 for ball configuration. Note 2. See Section 6.16.2.6 on page 459 for ball configuration. Note 3. No internal pull-up/down available. If not used, tie low. AMD Geode™ CS5535 Companion Device Data Book Table 3-8. GPIO Options Post Reset Weak Recommended ...

Page 48

... Note 11. GPIOH_IN_EN (GPIO Offset A0h) and GPIOH_IN_AUX1_SEL (GPIO Offset B4h) are enabled. Note 12. Reset default. Note 13. If the GPIO28 function is desired, the power button functionality in the PMC must be disabled before the IN_AUX1 function is dis- abled. 48 Signal Definitions AMD Geode™ CS5535 Companion Device Data Book ...

Page 49

... GPIOs that have a high drive capac- ity, open-drain output. The serial data function must be imple- mented in software to support DDC monitors. There is no dedicated DDC data function within the Geode CS5535 compan- ion device. I Low Battery Detect. This is a “recommended use” for GPIO25 in battery-powered systems ...

Page 50

... I Power Management Event. This is a “recommended use” for GPIO26. By mapping this GPIO (or any other) to the PME# func- tion, the Geode CS5535 companion device may be awakened from a Sleep state when the mapped ball (in the recommended case, ball B7) is pulled low. AMD Geode™ CS5535 Companion Device Data Book ...

Page 51

... From reset, a pull-up makes this GPIO high. The active state of this signal indicates that the Geode CS5535 companion device is in the Sleep state. I Sleep Button. This GPIO can be mapped to a PME “button-push” ...

Page 52

... Geode CS5535 companion device enters and exits various power management modes. It may be used by external devices to control their power states synchronous with power state changes in the Geode CS5535 companion device. It may be con- figured as active high or active low. O Sleep Y. This general purpose power control output becomes active as the Geode CS5535 companion device enters and exits various power management modes ...

Page 53

... P2 T_DEBUG_IN M2 T_DEBUG_OUT M3 LVD_TEST B9 TEST_MODE A6 FUNC_TEST F3 AMD Geode™ CS5535 Companion Device Data Book Type Description I JTAG Test Clock. I JTAG Test Mode Select. I JTAG Test Data In JTAG Test Data Out. From reset, this output is in TRI-STATE mode only enabled and driven when commanded to output or pass- through data per JTAG standards ...

Page 54

... Ground Connection (Total of 18) --- No Connection (Total of 19). These lines must be left disconnected. Connecting any or these lines to a pull-up/down resistor, an active sig- nal, power, or ground could cause unexpected results and possible malfunctions. AMD Geode™ CS5535 Companion Device Data Book Signal Definitions ...

Page 55

... RI - Request Data Out DI - Data In Figure 4-1. Simplified GLIU with Generic GeodeLink™ Devices AMD Geode™ CS5535 Companion Device Data Book A simplified view of a GLIU connected with three generic GeodeLink Devices is illustrated in Figure 4-1. The follow- ing points are relevant: • All outputs from a GeodeLink Device to the GLIU are registered. • ...

Page 56

... GeodeLink Device or via special GLIU descriptors. When the response arrives back at the processor, interface cir- cuits generate an SMI to invoke the SMM software. Lastly, all response packets contain an exception flag that can be set to indicate an error. AMD Geode™ CS5535 Companion Device Data Book ...

Page 57

... GeodeLink Device to route the packet to. If there is no hit, then the packet is routed to the default port. For the Geode CS5535 companion device, the default is always Port 4, that is, the Diverse Device (DD). GLIU ASMI & Error ...

Page 58

... Data In Req Out DD Data Out Diag Figure 4-3. AMD Geode™ CS5535 Companion Device GeodeLink™ Architecture Topology 58 MSR space is functionally similar to PCI configuration space. At boot time system initialization, the Core BIOS (see Section 4.1 "GeodeLink™ Architecture Overview" on page 55) traverses the topology of the system to determine what is present ...

Page 59

... There are no MSR byte enables. All 64 bits are always written and read. Many Geode CS5535 companion device MSRs are only 32 bits in physical size. In these cases, interface logic dis- cards the upper 32 bits on writes and pads the upper 32 bits on reads ...

Page 60

... Any value 5160xxxxh 111 Any value 5170xxxxh AMD Geode™ CS5535 Companion Device Data Book Global Concepts and Features Name & Comment This all-zero convention indi- cates to the GLPCI_SB that the MSR packet coming across the PCI bus is actually for the GLCPI_SB ...

Page 61

... Clock Control Units (CCU). Each of these is discussed in the following paragraphs. Before going into the blocks of the typical device, it should be noted that the following modules in the Geode CS5535 companion device follow this model very closely: — AC97 Controller (ACC) — ATA-5 Controller (ATAC) — ...

Page 62

... GeodeLink™ Device MSRs PCI GeodeLink™ Adapter Adapter Local Bus Interface Side-band signals to other Native Blocks External Device Interface AMD Geode™ CS5535 Companion Device Data Book Global Concepts and Features Reg In Data In Reg Out Data Out Diag ASMI ERR CCU CCU ...

Page 63

... Global Concepts and Features 4.5 Clock Considerations 4.5.1 Clock Domain Definitions Table 4-3 lists the clock sources and domains for the Geode CS5535 companion device. Table 4-3. Clock Sources and Clock Domains Component Pin Domain Name MHZ66_CLK ATAC_LB Inverted MHZ66_CLK GLIU_GLD ...

Page 64

... If use of GLCP_CLK_DIS_DELAY is desired, set the CLK_DLY_EN bit in GLCP_GLB_PM (MSR 5170000Bh[1] = 1). This will disable the use of GLCP_CLK4ACK and shut off the clocks in GLCP_PMCLKDISABLE after the GLCP_CLK_DIS_DELAY expires. This delay is measured in PCI clock edges. AMD Geode™ CS5535 Companion Device Data Book ...

Page 65

... The TAP Controller is in the Working power domain, but it may be reset separately from the other Working domain logic. • Any time the Geode CS5535 companion device is in the Standby state, the Working power domain is uncondi- tionally and immediately driven into reset. ...

Page 66

... De-assert Delay PCI_CLK Controller Power Good Working Power Good Standby (Standby Domain Reset When Low) Figure 4-6. Reset Logic AMD Geode™ CS5535 Companion Device Data Book Global Concepts and Features WORKING WORK_AUX Standby State Internal Reset to all Working Domain Logic ...

Page 67

... Memory and I/O Map Overview 4.7.1 Introduction There are several places in the Geode CS5535 companion device where addresses are decoded and routed: • Physical PCI Bus. The GLPCI_SB decodes PCI bus transactions and claims them with a “DEVSEL#” as appropriate. After claiming a transaction, the GLPCI_SB converts GLIU request packet ...

Page 68

... GLIU descriptors are only used to route requests from the GLPCI_SB and GLCP. 4.7.4 Legacy Keyboard Emulation In the Geode CS5535 companion device, there are two USB Controllers and hence two copies of this hardware. The USB control registers are memory mapped. The mem- ory region associated with these registers is relocatable via standard GLIU descriptor MSRs starting at an appropriate base address ...

Page 69

... LPC Controls, and Memory Mask. NOR Flash address control. Note 1. See Section 4.8 "Standard GeodeLink™ Device MSRs" on page 74 for register descriptions. AMD Geode™ CS5535 Companion Device Data Book I/O Space Memory Space Located by associated LBAR. 16-Byte KEL Host Controller reg- Defaults disabled ...

Page 70

... Shw$ --- --- 8-bit Yes 8-bit Yes AMD Geode™ CS5535 Companion Device Data Book Global Concepts and Features Comment 16-bit values in two transfers. 16-bit values in two transfers. 16-bit values in two transfers. 16-bit values in two transfers. 16-bit values in two transfers. 16-bit values in two transfers. ...

Page 71

... No Specific Usage 0C2h Master DMA Counter - Channel 4 0C3h No Specific Usage 0C4h Master DMA Address - Channel 5 0C6h Master DMA Counter - Channel 5 AMD Geode™ CS5535 Companion Device Data Book 31506B Size R/W Comment --- --- 8-bit Yes If KEL Memory Offset 100h[ (EmulationEnable bit). ...

Page 72

... MSR bit enables/disables into I/O space.(UART1 MSR 51400014h[18:16], UART2 MSR 51400014h[22:20]). Defaults to LPC. --- --- 8-bit RO Second Floppy. 8-bit RO Second Floppy. 8-bit Shw@ Second Floppy. 8-bit --- 8-bit RO Second Floppy. 8-bit Yes Second Floppy. 8-bit --- AMD Geode™ CS5535 Companion Device Data Book ...

Page 73

... Note 1. The Diverse Device snoops writes to this port and maintains the MSB as NMI enable. When low, NMI is enabled. When high, NMI is disabled. This bit defaults high. Reads of this port return bits [6:0] from the on-chip or off-chip target, while bit 7 is returned from the “maintained” value. AMD Geode™ CS5535 Companion Device Data Book 31506B Size ...

Page 74

... Section 6.0 "Register Descriptions" on page 199 for descriptions. 4.8.3 MSR Address 2: SMI Control Each GeodeLink Device within the Geode CS5535 com- panion device incorporates System Management Inter- rupts (SMIs). These SMIs are controlled via the Standard GLD_MSR_SMI located at MSR Address 2 within each GeodeLink Device (see Table 4-8) ...

Page 75

... NESS. Under this arrangement, the following Virtual System Architecture™ (VSA) software sequence would be typical: 1) Assume EN[n] is high. 2) Event[X] fires and causes a Geode CS5535 compan- ion device ASMI. 3) VSA searches the Geode GX processor/Geode CS5535 companion device system looking for the ASMI source and finds ASMI[n+1]. ...

Page 76

... CS5535 companion device supports a mechanism called “Apparent SSMI” using ASMIs. (Hereafter “Apparent SSMI” is referred to as “SSMI”.) The Geode CS5535 companion device insures that the ASMI is taken on the I/O instruction boundary. The ASMI reaches the CPU before a target ready is signaled on the PCI bus ...

Page 77

... Shutdown Special Cycle 0 ASMI Halt Special Cycle 0 SSMI IRQ from ACC 1 ASMI INT by the USB (see PIC for actual source) 0 ASMI ASMI for the USB (see USB for actual source) 1 ASMI Debug event 0 ASMI Convert Geode CS5535 companion Global GLIU_Error to ASMI 31506B 77 ...

Page 78

... MSR Address 3: Error Control Each GeodeLink Device within the Geode CS5535 com- panion device can generate errors. Furthermore, these errors are controlled via the Standard GeodeLink Device Error MSR (GLD_MSR_ERROR) located at MSR Address 3 within each GeodeLink Device. The register is organized ...

Page 79

... The extent to which these resources are employed depends on the application and the discretion of the sys- tem designer. The Geode GX processor and Geode CS5535 companion device contain advanced power management features for reducing the power consumption of the processor, com- panion device and other devices in the system. ...

Page 80

... Power Domains In order to support power management in periods of inac- tivity as well as “off” conditions, the Geode CS5535 com- panion device is divided into three power domains: • Working Domain - Consists of V CORE • Standby Domain - Consists of V CORE_VSB • RTC Domain - Consists of V ...

Page 81

... Module Functional Descriptions 5.0Module Functional Descriptions The modules that make up the AMD Geode™ CS5535 companion device (shown in gray in Figure 5-1) are: • GeodeLink™ Interface Unit • GeodeLink PCI South Bridge • GeodeLink Control Processor • ATA-5 Controller (IDE Controller multiplexed with Flash Interface) • ...

Page 82

... GeodeLink™ Interface Unit 5.1.1 GLIU Port Connections Table 5-1 shows the GeodeLink Devices connected to each of the seven GLIU ports on the Geode CS5535 com- panion device. Table 5-1. GLIU Port Connections Port # GeodeLink™ Device 1 GeodeLink PCI South Bridge (GLPCI_SB) ...

Page 83

... IOD_SC IOD_SC IOD_SC ACC P2D_BM IOD_BM GLPCI_SB P2D_BM Spares IOD_BM IOD_BM IOD_SC P2D_BM AMD Geode™ CS5535 Companion Device Data Book # of Usage 1 Do not hit on keyboard emulation registers not hit on keyboard emulation registers. 1 For IDE master registers. 1 Defaults to 1Fxh. 1 Defaults to 3F6h. ...

Page 84

... Figure 5 block diagram of the GLPCI_SB module. AMD Geode™ GX Processor PCI Bus Interface Transaction Forwarding FIFOs/Synchronization GeodeLink™ Interface Request Request Data Figure 5-2. GLPCI_SB Block Diagram AMD Geode™ CS5535 Companion Device Data Book GeodeLink™ PCI South Bridge CIS PCI Bus Side-band signals CIS ...

Page 85

... AMD Geode™ CS5535 Companion Device Data Book 31506B Support IDE data port Read Prefetch when MSR Control register (MSR 51000010h[19:18]) is set to IDE prefetch for performance enhancement ...

Page 86

... I/O write will complete before the posted memory write completes. In order to prevent out of order execution, when a memory write is issued to the GLIU in the Geode CS5535 companion device, the request packet is issued with the send response bit set to serialize the request. I/O writes are not an issue, since the requests packet always has the send response bit set. AMD Geode™ ...

Page 87

... CPU Interface Serial (CIS) The CIS provides the system interface between the Geode CS5535 companion device and Geode GX processor. The interface supports several modes to send different combi- nations of 16-bit side-band signals through the CIS signal (ball P3). The sideband signals are synchronized to the PCI clock through 2-stage latching ...

Page 88

... Exception Handling This section describes how various errors are handled by the PCI Bus Interface block. Since PERR# is not implemented on the Geode CS5535 companion device or the Geode GX processor, error reporting via this signal is not supported Geode GX processor/CS5535 companion device system, other PCI devices that do have the PERR# pin must have a pull-up ...

Page 89

... Bit Clock Output Data Mux AMD Geode™ CS5535 Companion Device Data Book • Transport for audio data to and from the system memory and AC97 codec. • Capable of outputting multi-channel 5.1 surround sound (Left, Center, Right, Left Rear, Right Rear, and Low Frequency Effects) ...

Page 90

... Center Channel Playback (slot 6) or Headset Playback (slot 11 (configurable) Microphone Record (slot 6) or Headset Record (slot 11) 7 (left) and 8 (right) Left and Right Surround Playback 9 Low Frequency Effects Playback (LFE) AMD Geode™ CS5535 Companion Device Data Book AC97 Audio Codec Controller ...

Page 91

... MHz (81.4 ns) AC_CLK AC_S_IN or AC_S_IN2 Codec Slot 1 Slot 2 Slot 12 “0” Ready End of Previous Frame Time slot “valid” bits (“1” = Time slot contains valid PCM data) AMD Geode™ CS5535 Companion Device Data Book PCM PCM LINE1 PCM PCM ...

Page 92

... MSB first, unused LSBs = 0). Slot 9: PCM Playback LFE Channel Outputs the low frequency effects channel DAC data (16- bit resolution, MSB first, unused LSBs = 0). Slot 10: Not used Slots 10 is not used by the ACC. AMD Geode™ CS5535 Companion Device Data Book ...

Page 93

... AC Link always outputs frames at 48 kHz. The SLOTREQ bits serve as the codec’s instrument to tell the ACC whether it needs a sample for a given slot AMD Geode™ CS5535 Companion Device Data Book 31506B on the next output frame. For each bit Send data NOT send data ...

Page 94

... If a buffer overrun occurs on an incoming bus master, samples coming in on the serial link are tossed away until space becomes available in the bus master’s buffer. AMD Geode™ CS5535 Companion Device Data Book ...

Page 95

... AMD Geode™ CS5535 Companion Device Data Book For mono streams (bus masters and 7): Memory Region Base Address and Size should be a multiple of two (WORD aligned). Descriptions of the control flags are: • End of Transfer (EOT set in a PRD, this bit indi- cates the last entry in the PRD table ...

Page 96

... Low 1 3 High 1 PRD_1 Size_1 PRD_2 Size_2 PRD_3 Don’t Care Figure 5-7. ACC PRD Table Example AMD Geode™ CS5535 Companion Device Data Book AC97 Audio Codec Controller 1 Channel, Big Endian Byte Sample Left High 0 Left Low 0 Right High ...

Page 97

... Since Address_3 is the location of PRD_1, the bus master has looped the PRD table. No interrupt is gen- erated for PRD_3. AMD Geode™ CS5535 Companion Device Data Book 31506B Pausing the bus master can be accomplished by set- ting the Bus Master Pause bit in its control register. ...

Page 98

... Doing so could lock up the codec or ACC the system has cut off power to the codec and restarted it not necessary to initiate a warm reset. The AC Link Shutdown should be cleared manually to restart the operation of the AC Link. AMD Geode™ CS5535 Companion Device Data Book ...

Page 99

... IDE_IOW#). The PIO portion of the IDE registers is enabled through: • Channel 0 Drive 0 PIO (ATAC_CH0D0_PIO) (MSR 51300020h) AMD Geode™ CS5535 Companion Device Data Book 31506B • Channel 0 Drive 1 PIO (ATAC_CH0D1_PIO) (MSR 51300022h) The IDE channel and devices can be individually pro- grammed to select the proper address setup time, asserted time, and recovery time ...

Page 100

... In response to the interrupt, software resets the Bus Master Control bit in the Command register. It then reads the status of the controller and IDE device to determine if the transfer is successful. Byte 2 Byte 1 AMD Geode™ CS5535 Companion Device Data Book ATA-5 Controller Byte ...

Page 101

... ATAC negates STOP and asserts DMARDY#. The IDE device then sends the first data word and asserts STROBE. AMD Geode™ CS5535 Companion Device Data Book The data transfer phase continues the burst transfers with the ATAC and the IDE via providing data, toggling STROBE and DMARDY# ...

Page 102

... Embedded PCI Bus PCI PCI Slave Interface PCI I/O List Processor SIE Figure 5-8. USB Core Block Diagram AMD Geode™ CS5535 Companion Device Data Book Universal Serial Bus Controller ® , and National Semiconductor. The PCI Master Host Controller Bus Master Data Buffer ...

Page 103

... W SB USPEND S AMD Geode™ CS5535 Companion Device Data Book sal Serial Bus, which in turn is described by the Universal Serial Bus specification. OHCI allows multiple host control- ler vendors to design and sell host controllers with a com- mon software interface, freeing them from the burden of writing and distributing software drivers ...

Page 104

... The main blocks of the DIVIL are: Address Decode, Stan- dard MSRs, Local BARs, and Dataout Mux (DOM GeodeLink™ Adapter * AMD Geode™ CS5535 Companion Device Data Book Diverse Integration Logic 8254 & Port B (2) 8259A & IRQ Map Kybd Emu & Port A System Mgmt ...

Page 105

... MSR_LBAR_IRQ MSR_LBAR_GPIO MSR_LBAR_ACPI MSR_LBAR_FLASH_IO Figure 5-11. I/O Space LBAR - Fixed Target Size AMD Geode™ CS5535 Companion Device Data Book mask and base address values are established via an MSR. 5.6.1.1 Fixed Target Size I/O LBARs This discussion applies to the following LBARs: • ...

Page 106

... Rule on page 105). Lastly, the memory target can not be smaller than 4 KB. [15:4] Compare Hit [31:12] Compare Hit Figure 5-13. Memory Space LBAR AMD Geode™ CS5535 Companion Device Data Book Diverse Integration Logic [15:4] BASE_ADDR [31:12] BASE_ADDR ...

Page 107

... All other values All other values Read 00h All other values AMD Geode™ CS5535 Companion Device Data Book 5.6.2 Standard MSRs This block contains the Standard GeodeLink Device MSRs and their associated logic. These standard MSRs are: Capabilities, Master Configuration, SMI Control, Error Con- trol, Power Management, and Diagnostics ...

Page 108

... Allows several counter latch commands in parallel with the read-back command. CPU GeodeLink™ Adapter Local Bus PIT Shadow Register c Timer 1 Figure 5-14. PIT Block Diagram AMD Geode™ CS5535 Companion Device Data Book Programmable Interval Timer 14 MHz Divide By 12 Timer 2 ...

Page 109

... Bits [7:6] = Select counter to latch Figure 5-15. PIT Counter Latch Command Format AMD Geode™ CS5535 Companion Device Data Book the counting mode of the counter selected by bits [5:4]. Bit 0 of the Control Word register defines the binary or BCD counting format. The maximum loadable count value is not FFFFh (binary counting) or 9999 (BCD counting), but 0 ...

Page 110

... Not before zero = meaningful to read back the counter value MODE Figure 5-17. PIT Status Byte Format AMD Geode™ CS5535 Companion Device Data Book Programmable Interval Timer BCD ...

Page 111

... Unrestricted Z Input 3 : Unrestricted Z Input 15 Note: The outputs are organized into 16 groups of four signals each, except IG0 and IG2; they have two signals each. AMD Geode™ CS5535 Companion Device Data Book 5.8.1 Mapper and Masks This block maps and masks interrupt sources to 60 discrete Extended PIC (XPIC) inputs ...

Page 112

... LPC IRQ6 LPC IRQ7 LPC IRQ8 LPC IRQ9 LPC IRQ10 LPC IRQ11 LPC IRQ12 LPC IRQ13 LPC IRQ14 LPC IRQ15 AMD Geode™ CS5535 Companion Device Data Book Programmable Interrupt Control Legacy IRQ 8254 Timer Keyboard None UART UART Parallel Port 2 Floppy ...

Page 113

... GPIO Interrupt 5 Input 14 GPIO Interrupt 6 Input 15 GPIO Interrupt 7 AMD Geode™ CS5535 Companion Device Data Book 31506B Comment This is a pulse from the RTC. Must use edge triggered inter- rupt, that is, level interrupt will not work all audio codec interrupts and master interrupts. ...

Page 114

... INTA INT IR0 IR1 IR2 IR3 IR4 IR5 IR6 IR7 IRQ12 IRQ14 IRQ0 IRQ13 IRQ15 AMD Geode™ CS5535 Companion Device Data Book Programmable Interrupt Control D0-D7 INTA INT 8259A Master IRQ2 IRQ4 IRQ6 IRQ1 ...

Page 115

... CAS1 Buffer/ Comparator CAS2 SP/EN AMD Geode™ CS5535 Companion Device Data Book registers is eight bits wide, where every bit corresponds to one of the IR0-IR7 input lines. Priority Resolver The priority resolver block manages the hardware requests according to their priority. As several bits may be set in the IRR simultaneously, the priority encoder passes only the highest priority bit ...

Page 116

... L0-L2 is the binary level of the ISR bit to be reset). Automatic End of Interrupt (AEOI) Mode The PIC automatically performs a non-specific EOI at the trailing edge of the last INTA pulse. This mode is not sup- ported in the Geode CS5535 companion device. AMD Geode™ CS5535 Companion Device Data Book Write Data ICW1 OCW2 ...

Page 117

... This is OK. On-chip, the interrupt sense is inverted. Lastly, note that for the edge interrupts the edge must remain high until the interrupt acknowledge action. AMD Geode™ CS5535 Companion Device Data Book 31506B Assume LPIC is initialized as follows: ;Set Initialization Command Words (ICWs) ...

Page 118

... Note that the above procedure did not use the Interrupt Mask Register (IMR), but variations on the above could have. Lastly note the first discussion, drivers do not directly interact with the LPIC. AMD Geode™ CS5535 Companion Device Data Book ...

Page 119

... Bus Interface Data LBus I/F and Registers Figure 5-21. DMA Module Block Diagram AMD Geode™ CS5535 Companion Device Data Book 31506B • Allow the data bus to be released in between DMA transfers during demand or bulk mode to allow transfers to the DMA module or the module doing DMA transfers. ...

Page 120

... For this case, the PCI bus is held by the Core Logic module until a break in the transfers occurs. In the Geode CS5535 companion device design, block and demand transfers behave much like single transfer mode to avoid the lockout problem. ...

Page 121

... The DMA Page register values are driven on PCI address bits AD[31:16] for 8-bit channels and AD[31:17] for 16-bit channels. AMD Geode™ CS5535 Companion Device Data Book 31506B The middle address portion, which selects a block within the page, is generated by the DMA controller at the begin- ning of a DMA operation and any time the DMA address increments or decrements through a block boundary ...

Page 122

... Logic is the most complex and is discussed first. Keyboard Emulator Logic (KEL) * Read-Back Multiplexer is not shown Figure 5-22. KEL Block Diagram AMD Geode™ CS5535 Companion Device Data Book Keyboard Emulation Logic IRQ 1 (to PIC Subsystem) IRQ 12 (to PIC Subsystem) EmulationInterrupt ASMI ...

Page 123

... HceOutput, HceStatus, and/or HceInput operational regis- ters. The KEL described here supports a mixed environment in which either the keyboard or mouse is implemented as an AMD Geode™ CS5535 Companion Device Data Book alternative device and the other device is attached to a standard PS/2 interface. via ...

Page 124

... IRQ1 and IRQ12 with respect to ExternalIRQEn and IRQEN bits is summarized in Table 5-17. Table 5-17. KEL Mixed Environment LPC_ Output LPC_IRQ1 IRQ12 Full AMD Geode™ CS5535 Companion Device Data Book Keyboard Emulation Logic require service. Each new Output IRQ1 IRQ12 FullAux Active Active ...

Page 125

... A20 (A20 gets asserted). As above, an ASMI is only generated on an INIT or A20 event. The INIT operation always forces A20 high. Writes to bits 2 and AMD Geode™ CS5535 Companion Device Data Book 31506B higher are a “don’t care”. Reads to Port A always return 00h or 02h depending on the state of the bit 1 of Port A ...

Page 126

... HCE_Control.EmulationEnable (KEL Memory Offset 100h[0]) and HCE_Status.InputFull (KEL Memory Offset 10Ch[1]), or HCE_Control.ExternlIRQEn (KEL Memory Offset 100h[4]) and HCE_Control.IRQ1Active (KEL Memory Offset 100h[6]) or HCE_Control.IRQ12Active (KEL Memory Offset 100h[7]). AMD Geode™ CS5535 Companion Device Data Book Keyboard Emulation Logic ...

Page 127

... Local Bus Interface Data In Data In AMD Geode™ CS5535 Companion Device Data Book The SMB Controller’s protocol uses a two-wire interface for bidirectional communication between the ICs connected to the bus. The two interface lines are the Serial Data Line 2 C ...

Page 128

... VDD 0.4V -200 µA 200 µA -10 µA 10 µA 2.7V 5.5V = 0.4V 4.0 mA 400 300 mV p-p AMD Geode™ CS5535 Companion Device Data Book System Management Bus Controller ACCESS.bus Min Max Min Max 0 kHz 100 kHz 10 kHz 100 kHz 4.7 µs 4.7 µ ...

Page 129

... Stable: of Data Data Valid Allowed Figure 5-24. SMB Bit Transfer AMD Geode™ CS5535 Companion Device Data Book 31506B 5.11.1.1 START and STOP Conditions The SMB master generates START and STOP conditions (control codes). After a START condition is generated, the bus is considered busy and retains this status for a certain time after a STOP condition is generated ...

Page 130

... Interrupt Within Receiver While Interrupt is Serviced Figure 5-26. SMB Data Transaction Figure 5-27. SMB Acknowledge Cycle AMD Geode™ CS5535 Companion Device Data Book System Management Bus Controller ACK STOP Condition Transmitter Stays Off Bus During Acknowledge Clock Acknowledge Signal From Receiver ...

Page 131

... Address R/W ACK Condition Figure 5-28. SMB Complete Data Transaction AMD Geode™ CS5535 Companion Device Data Book The address consists of the first seven bits after a START condition. The direction of the data transfer (R/W) depends on the bit sent after the address, the eighth bit. A low-to- ...

Page 132

... SMBST.MASTER is cleared. Table 5-19. SMB Native Registers Map SMBSDA SDAST BER NEGACK STASTR TGSCL TSDA GCMTCH NMINTE GCMEN ACK SMBADDR AMD Geode™ CS5535 Companion Device Data Book System Management Bus Controller NMATCH MASTER XMIT MATCH BB BUSY RSVD INTEN STOP START EN EN ...

Page 133

... This causes a negative acknowl- edge to be sent. 3) Read the data byte from SMBSDA. AMD Geode™ CS5535 Companion Device Data Book Before receiving the last byte of data, set SMBCTL1.ACK. Before generating a STOP condition or generating a repeated START condition necessary to perform an SDA read and clear the SMBST ...

Page 134

... SMB or by another System Management Bus device. In case of a conflict with another bus master, a shorter clock high period may be forced by the other bus master until the conflict is resolved. AMD Geode™ CS5535 Companion Device Data Book System Management Bus Controller ...

Page 135

... Acknowledge 4) Word Address 5) Acknowledge SDA Line Device Address Word Address (n) SDA Line SDA Line Figure 5-31. SMB Current Address Read AMD Geode™ CS5535 Companion Device Data Book 6) Data1 7) Acknowledge 8) Data(n) 9) Acknowledge 10) Data(n+1) 11) Acknowledge 12) Data(n+x) 13) Acknowledge 14) STOP Current Address Read Sequence of Events (see Figure 5-31): ...

Page 136

... Acknowledge 4) Data(n) 5) Acknowledge 6) Data(n+1) 7) Acknowledge 8) Data(n+2) 9) Acknowledge 10) Data(n+x) 11) No Acknowledge 12) STOP Device Address Figure 5-32. SMB Random Read Data (n+1) Data (n+2) Figure 5-33. SMB Sequential Reads AMD Geode™ CS5535 Companion Device Data Book System Management Bus Controller Data (n) Data ( ...

Page 137

... MSR_CONFIG Modem/Control Signals MSR_RSVD DMA Controller Figure 5-34. UART/IR Overview Diagram AMD Geode™ CS5535 Companion Device Data Book Figure 5-34 shows the serial port connections to the peripheral devices and host, as well as the device configu- ration. Features • Fully compatible with 16550 and 16450 devices (except modem) • ...

Page 138

... RXWDG RSVD LBGD[7:0] LBGD[15:8] RSVD STKP EPS BSR[6:0] RSVD BGD[7:0] BGD[15:8] EDTLBK LOOP DMASWP BSR[6:0] PRESL[1:0] RSVD AMD Geode™ CS5535 Companion Device Data Book UART and IR Port RXD2 RXD1 TXD2 TXD1 LS_IE TXLDL_IE RXHDL_IE LS_IE TXLDL_IE RXHDL_IE IPR[1:0] LS_EV/ TXLDL_EV ...

Page 139

... BSR BKSE 04h IRCFG1 STRV_MS RSVD 05h- RSVD 06h 07h IRCFG4 RSVD Note 1. Non-Extended Mode. Note 2. Extended Mode. AMD Geode™ CS5535 Companion Device Data Book MID[3:0] STKP EPS PEN TXFTH[1:0] RSVD BSR[6:0] RSVD RSVD RSVD BSR[6:0] RSVD RSVD BSR[6:0] ...

Page 140

... IRCR1 register when the UART is in non-extended mode. This prevents legacy software, running in non-extended mode, from spuriously switching the functional block to UART mode when the software writes to the MCR. AMD Geode™ CS5535 Companion Device Data Book UART and IR Port STOP ...

Page 141

... If 6_PLS or 8_PLS mode is selected, six or eight pulses are generated each time a logic 0 bit is transmitted following a logic 1 bit. AMD Geode™ CS5535 Companion Device Data Book 31506B C_PLS modulation mode is used for RC-5, RC-6, NEC, and RCA protocols. 8_PLS or 6_PLS modulation mode is used for the RECS 80 protocol ...

Page 142

... TX_FIFO. Whenever a byte is loaded into the TX_FIFO, the timer is reloaded with the initial value byte is loaded for a 64 µs time, the timer times out and the internal flag is cleared, thus enabling the transmitter. AMD Geode™ CS5535 Companion Device Data Book UART and IR Port ...

Page 143

... ETDLBK and BTEST of the EXCR1 register are cleared. • UART mode is selected. • The functional block switches to non-extended mode. AMD Geode™ CS5535 Companion Device Data Book 31506B When fallback occurs from non-extended mode, only the first three of the above actions occur. If either Sharp-IR or SIR infrared modes were selected, no switching to UART mode occurs ...

Page 144

... Dongle Interface The dongle interface on the Geode CS5535 companion device is not a fully hardware compatible interface. The real dongle interface requires six external interface signals and the Geode CS5535 companion device only supports three. With only three signals, the dongle interface sup- ports a subset of the real dongle interface through virtual- ization ...

Page 145

... ID0 ID2 ID1 ID0 IRRX1 IR Transceiver AMD Geode™ CS5535 Companion Device Data Book The operational mode of an infrared dongle that uses a non-serial transceiver is selected by the driving the IRSL[2:0] signals. Features • Uses only three pins to connect to IR transceiver. • Fully supports legacy software written for real dongle, with some manual intervention. • ...

Page 146

... The Low Pin Count port is based on Intel’s Low Pin Count (LPC) Interface Specification v1.0. In addition to the required pins, the Geode CS5535 companion device also supports two optional pins: LDRQ# and SERIRQ. The LPC interface supports memory, I/O, DMA, and Intel’s Firmware Hub Interface ...

Page 147

... DMA or target accesses. Bits [3:2] are used for cycle type and bit 1 is used for direction. Bit 0 is reserved. AMD Geode™ CS5535 Companion Device Data Book SIZE: This field is one clock driven by the host on memory and DMA transfers to determine how many bytes are to be transferred ...

Page 148

... I/O Write Memory Read Memory Write DMA Read DMA Write Reserved FWH Read FWH Write Reserved Definition I/O Read I/O Write Memory Read Memory Write Reserved Definition 8-Bit Reserved AMD Geode™ CS5535 Companion Device Data Book Low Pin Count Port ...

Page 149

... Special case. Peripheral indicating errors, see sync section in protocol overview. 1001 DMA (only). Sync achieved with no error and more DMA transfer desired to continue AMD Geode™ CS5535 Companion Device Data Book DMA. Sync achieved with no error. Also indicates no more transfer desired for that chan- nel, and DMA request is de-asserted ...

Page 150

... An abort typically occurs on SYNC timeouts. ADDR TAR SYNC DATA ADDR TAR SYNC Peripheral must Stop driving Too many Syncs causes Timeout AMD Geode™ CS5535 Companion Device Data Book Low Pin Count Port TAR START 2 1 Chip set will drive high ...

Page 151

... LCLK LDRQ# Figure 5-41. DMA Cycle Timing Diagram AMD Geode™ CS5535 Companion Device Data Book requested channel is active or not. The case where the ACT is low (inactive) will be rare, and is only used to indi- cate that a previous request for that channel is being aban- doned ...

Page 152

... Table 5-26. IRQ Data Frames Date Frame Number IRQ status 31-16 AMD Geode™ CS5535 Companion Device Data Book Low Pin Count Port Usage IRQ0 IRQ1 SMI# (Not Supported) IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ13 IRQ14 IRQ15 Unassigned ...

Page 153

... Turn Around Cycle. Dead cycle to prevent bus contention. Continues Mode: Quiet Mode: REC: Recover, host actively drives SERIRQ high. TAR: Turn Around Cycle. Dead cycle to prevent bus contention. AMD Geode™ CS5535 Companion Device Data Book START REC TAR Host Host Controller or Slave Figure 5-42 ...

Page 154

... Intel FWH will start “processing” incoming data before it generates its SYNC field, it should be considered a non- buffered peripheral device. IDSEL ADDR MSIZE TAR Figure 5-45. FWH Read Cycle AMD Geode™ CS5535 Companion Device Data Book Low Pin Count Port SYNC DATA TAR ...

Page 155

... LCLK LFRAME# (FWH4) LAD[3:0] START IDSEL (FWH0-FWH3) Number of Clock Cycles AMD Geode™ CS5535 Companion Device Data Book Table 5-27. FWH Read Cycle Peripheral I/O Description I On the rising edge of CLK with LFRAME# low, the contents of LAD[3:0] indicate the start of an FWH cycle. ...

Page 156

... The FWH device drives LAD[3:0] to 0000b to indicate it has received data or a command. O The FWH device drives LAD[3:0] to 1111b, indicating a turnaround cycle. N/A The FWH device floats its output and the LPC host takes control of LAD[3:0]. AMD Geode™ CS5535 Companion Device Data Book Low Pin Count Port ...

Page 157

... V BAT KHZ32_XCI Low Power Osc. KHZ32_XCO AMD Geode™ CS5535 Companion Device Data Book • Valid timekeeping during power-down, by utilizing external battery backup • 242 bytes of battery-backed RAM • RAM lock schemes to protect its content • Internal oscillator circuit (the crystal itself is off-chip), or external clock supply for the 32 ...

Page 158

... Figure 5-48. Recommended External Component Values 32.768 kHz Parallel Mode N-Cut or XY-bar 40 kΩ 35000 User-defined 20 MΩ (Note AMD Geode™ CS5535 Companion Device Data Book Real-Time Clock Features To other modules Internal External KHZ32_XCO Connections Tolerance User-defined Max Min ...

Page 159

... General Purpose Input/Output Proper use and understanding of the General Purpose Input/Output (GPIO) subsystem is the key to applying the Geode CS5535 companion device in a custom system design. By totalizing the optional features of the Geode CS5535 companion device GPIOs, system functions such as soft buttons, DDC monitoring, timers, system interrupts, and others, may be implemented ...

Page 160

... LPC_FRAME# Hardware default Table 3-6 "DIVIL_BALL_OPT (MSR 51400015h)" on page 34 WORK_AUX OUT_ENABLE OUT_AUX1_SELECT LOW_BAT# INPUT_ENABLE IN_AUX1_SELECT 160 Note = Software write OUT_VALUE = 1 Software write OUT_VALUE = Software read READ_BACK = 1 Software read READ_BACK = AMD Geode™ CS5535 Companion Device Data Book General Purpose Input/Output ...

Page 161

... GPIO # AMD Geode™ CS5535 Companion Device Data Book GPIO5 has the logic 0 bit position (register bit 13), and the logic 1 bit position (register bit 5), so the GPIO5 feature bit would become a 1. GPIO4 has the logic 0 bit position (register bit 13), and the logic 1 bit position (register bit 5), so the GPIO4 feature bit would become a 0 ...

Page 162

... Event Digital Counter Filter Input Conditioning Functions ( AUX1 AUX2 Output Value Open-Drain Enable Figure 5-49. GPIO Configuration AMD Geode™ CS5535 Companion Device Data Book General Purpose Input/Output Pull-Up Input Enable Enable Input Invert Enable Ball Output Output Invert Enable Enable ...

Page 163

... General Purpose Input/Output 5.15.5 Input Conditioning Functions GPIOs and their corresponding IN_AUX function in the Geode CS5535 companion device may have their inputs conditioned by configurable circuitry as illustrated in Figure 5-49 on page 162. Any GPIO may be connected to one of eight Input Conditioning functions, each consisting of a Digital Filter and an Event Counter (known as an Event/Fil- ter pair) ...

Page 164

... Negative Edge Enable (GPIO[x]_NEGEDGE_EN). Enabled if feature bit is high. • Positive Edge Status (GPIO[x]_POSEDGE_STS). Set indicates edge. Write 1 to clear. • Negative Edge Status (GPIO[x]_POSEDGE_STS). Set indicates edge. Write 1 to clear. AMD Geode™ CS5535 Companion Device Data Book General Purpose Input/Output on GPIO[x]_POSEDGE_EN by writing ...

Page 165

... Geode CS5535 companion device from the system, may be steered (or ‘mapped’) to either interrupts, or power management events (PME). Sufficient steering logic exists in the Geode CS5535 companion device to provide for eight independent interrupts and simultaneously for eight independent PMEs. The eight GPIO interrupts are all in Working power domain; ...

Page 166

... Provide outputs for generating reset (limited to MFGPT0 to MFGPT5), IRQs, NMI, and ASMI (indirectly through PIC). 166 purpose timers Figure 5-50. MFGPT Top Level Block Diagram AMD Geode™ CS5535 Companion Device Data Book Multi-Function General Purpose Timer Working Domain Control and MSR Registers 32 kHz Prescaler 14.318 MHz ...

Page 167

... For MFGPT6 and MFGPT7, reads of these registers comes from the copy inside the timer. (TW Note: Restate reason or be more precise in reference.) AMD Geode™ CS5535 Companion Device Data Book 31506B 5.16.2.2 Setup Register The Setup Register contains the following control fields ...

Page 168

... This means no more accesses can occur, so there is no way to write to the Setup register to enable the timer clock. Care should be taken to see that this situation does not occur. AMD Geode™ CS5535 Companion Device Data Book Multi-Function General Purpose Timer ...

Page 169

... Count 16 Bit Sync Up Counter 32 kHz/14 MHz Little Endian Big Endian Bit Reverse Compare 1 Compare 1 Value Compare 2 Compare 2 Value AMD Geode™ CS5535 Companion Device Data Book 4 Scale Factor 0 V CORE 15 14 MHz/32 kHz Prescaler_Carry_Outs Count_Enable Stop Enable Standby State/ Sleep State Clear & ...

Page 170

... If the desired pulse train is of the opposite polarity, this can be inverted in the GPIO or generated with 16384 a different Compare 1 value. 32768 Input Word from Up Counter Output Word to Compare Circuit Figure 5-52. MFGPT Bit Reverse Logic AMD Geode™ CS5535 Companion Device Data Book Multi-Function General Purpose Timer ...

Page 171

... MFGPT6 and MFGPT7 cannot trigger reset. These outputs are controlled by MSR bits, and the NMI output can be fur- ther controlled by the MSB of I/O Address 070h. AMD Geode™ CS5535 Companion Device Data Book Pulse Train Output for Given Compare 1 Value (Note 1) 1 ...

Page 172

... V tied to ground. 5.17.2 Power States Table 5-34 shows the supported ACPI power states and how they relate to the Geode GX processor/CS5535 com- panion device system. ACPI power states not described are not supported. Hardware States Geode CS5535 ...

Page 173

... Geode CS5535 companion device, or main memory. • G1/S3: Save-to-RAM state. Requires explicit software action to enter this state. The Geode CS5535 companion device and other system context are lost. System state is saved in the main memory. To properly support this state, main memory power must be ...

Page 174

... The “explicit software action” begins with a write to PM1_CNT (ACPI I/O Offset 08h) starting the Sleep/Standby sequence. 2) The PMC issues a Sleep Request to the Geode CS5535 companion device GLCP and it passes the request as SUSP# to the Geode GX processor’s GLCP. 3) The Geode GX processor’s GLCP issues a suspend request to the processor ...

Page 175

... SLP_CLK_EN# signal must be the last control to assert because it turns off all system clocks. Note: External signals are not necessarily active high. Shown as active high for clarity. Figure 5-54. PMC System Sleep Sequence AMD Geode™ CS5535 Companion Device Data Book 31506B 7) ...

Page 176

... Note: External signals are not necessarily active high. Shown as active high for clarity. Figure 5-55. PMC System Wakeup Sequence 176 Power Management Control Sleep Request SUSP# SUSPA# GL Device Clock Control Sleep Acknowledge PCI/IDE Input Control SLEEP_X/SLEEP_Y PCI/IDE Output Control SLP_CLK_EN# AMD Geode™ CS5535 Companion Device Data Book ...

Page 177

... Section 5.17.3.2 "Sleep Controls"), SLEEP_X, SLEEP_Y and SLP_CLK_EN#. AMD Geode™ CS5535 Companion Device Data Book When going to sleep not enabled, SLEEP_X and SLEEP_Y do not assert at all. If they are enabled, the delay should be set to occur between the delays programmed in the PM_IN_SLPCTL and PM_OUT_SLPCTL registers ...

Page 178

... Sleep Acknowledge asserts. PCI/IDE outputs are disabled when Sleep Acknowledge asserts or after a programmable delay. SLEEP_X, SLEEP_Y, and SLP_CLK_EN# may be asserted if enabled. A Sleep wakeup event returns the system to Working state. AMD Geode™ CS5535 Companion Device Data Book Power Management Control ...

Page 179

... I/O Offset 4Ch) PM_FWKD Faulted to Work Delay and Enable (PMS I/O Offset 50h) AMD Geode™ CS5535 Companion Device Data Book The Faulted to Work Delay and Enable (PM_FWKD) regis- ter is the only one of the above registers that potentially applies during a re-start entry. ...

Page 180

... The system can only be in one of three states: Working, Sleep, or Standby. (system fault) CORE The activity of the inputs is to move the system from one state to another. Table 5-35. PM Events and Functions AMD Geode™ CS5535 Companion Device Data Book Power Management Control ...

Page 181

... Standby state entry. Working power is turned-off. Sleep If enabled and asserted for a programmable amount of time, the status bit (THRM_FLAG) in PM_SSC (PMS I/O Offset 54h[4]) is set and causes an Faulted Standby state entry. Working power is turned-off. Standby Ignored. AMD Geode™ CS5535 Companion Device Data Book 31506B 181 ...

Page 182

... Restart state entry. Working power is not turned-off. Sleep If asserted, the status bit (BADPACK_RST_FLAG) in PM_SSC (PMS I/O Offset 54h[12]) is set and causes a Restart state entry. Working power is not turned-off. 182 Power Management Control AMD Geode™ CS5535 Companion Device Data Book ...

Page 183

... Flash Controller 5.18 Flash Controller The Geode CS5535 companion device has a Flash device interface that supports popular NOR Flash and inexpen- sive NAND Flash devices. This interface is shared with the IDE interface (ATA-5 Controller (ATAC)), using the same balls. NOR or NAND Flash may co-exist with IDE devices using PIO (Programmed I/O) mode. The 8-bit interface supports up to four “ ...

Page 184

... Retrieve ECC parity data from redundant data area and compare them to ECC0 and ECC1. 14) Correct data if data error is detected and can be fixed. Figure 5-56 on page 184 shows a basic NAND read cycle. PA1 PA2 D0 D1 AMD Geode™ CS5535 Companion Device Data Book Flash Controller D D2 (n-1) ...

Page 185

... NAND Flash device. On power-up, the ECC engine is configured to be odd parity. Even or odd ECC parity is controlled by bit 2 of NAND ECC Control reg- ister (Flash Memory Offset 815h). AMD Geode™ CS5535 Companion Device Data Book 31506B Table 5-36. ECC Parity/Bit Address Relationship Parity ...

Page 186

... Alternatively, the NOR device internal status may be read to determine when the write operation is com- plete. Refer to NOR Flash manufactures data sheets for additional write operation details. AMD Geode™ CS5535 Companion Device Data Book Flash Controller ...

Page 187

... Higher Address DATA (read) Higher Address AMD Geode™ CS5535 Companion Device Data Book ond clock period. A 74LCX373 only needs 4 ns setup time and 2 ns hold time (worst case). This timing provides a lot of flexibility for the designing of the board. In the data phase, the address bus and write data bus are available in the first clock period ...

Page 188

... Wait States tS tP » » » tS » » Data » » » » » AMD Geode™ CS5535 Companion Device Data Book Flash Controller Y+2 Z Z+1 Z+2 » » » » tH » » Don’t Care » tH » » ...

Page 189

... Can be set the hold time is not needed CTLR_BUSY WE# I/O[7:0] Note: CTLR_BUSY is bit 2 of the NAND Status register (Flash Memory Offset 810h or Flash I/O Offset 06h). Figure 5-59. NAND Flash Command/Address Timing AMD Geode™ CS5535 Companion Device Data Book X+1 3 tCS » ...

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... Y » » » » » » tWS / tRS tWP / tRP » » » » » » » AMD Geode™ CS5535 Companion Device Data Book Flash Controller Z Z+1 Z+2 » tWH / tRP » » » Y+1 Z Z+1 Z+2 » » » ...

Page 191

... This is one of the active high soft reset sources going to the Power Management GLCP_SYS_RST register. When active, all circuitry in the Geode CS5535 companion device is reset (including the GLCP_SYS_RST register itself). 5.19.1.2 Clock Control The GLCP provides a mechanism to shut off clocks. The busy signal from a module can control the clock gating in ...

Page 192

... CCU is needed to be able to perform reset syn- chronization and to turn off the internal clock to support TAPSCAN. The CCUs used by the GLCP are the asyn- chronous versions, since the GLCP outputs asynchronous busy signals. specified in AMD Geode™ CS5535 Companion Device Data Book GeodeLink™ Control Processor ...

Page 193

... LVD Standby Reset Memory BIST Interface Figure 5-63. TAP Controller, Boundary Scan Block Diagram AMD Geode™ CS5535 Companion Device Data Book RESET_STAND#, the TAP state machine will immediately enter the Test-Logic-Reset state. The TAP has specific pre-assigned meanings to the bits in the 24-bit IR register ...

Page 194

... Revision ID. The TAP instruction used to access the current revision code (8 bits) for the chip. TRI-STATE. Put chip into TRI-STATE and comparison mode. Parallel RAM BIST. Internal data register (for chip test). ID Code. 0FE1101Fh for the Geode CS5535 companion device. MSB ID[31:28] ID27 ...

Page 195

... OP[2:0] Operation Bits 2 through 0. Selects for how the JTAG chains are wired together. 000: 001: 010: 011: 100: 101: 110: 111: AMD Geode™ CS5535 Companion Device Data Book bistEn12 bistEn11 bistEn10 bistEn9 bistEn8 bistEn7 bistEn6 bistEn5 bistEn4 bistEn3 bistEn2 ...

Page 196

... This mode works well with the FS2 JTAG control soft- ware available with Geode CS5535 companion device. The Scan Enable signal to the block will be inactive during this clock. Scan Out GeodeLink™ Device TAP AMD Geode™ CS5535 Companion Device Data Book TAP Controller Pad ...

Page 197

... TAP Controller Scan In[0] Scan In[1] TDI Pad Test Mode = 0 TDO Figure 5-65. TAP Controller and TAPSCAN Mode AMD Geode™ CS5535 Companion Device Data Book GeodeLink™ Device TAP TAP_INST[23 Select 31506B Scan Out[0] Scan Out[1] TDO Pad 197 ...

Page 198

... AMD Geode™ CS5535 Companion Device Data Book TAP Controller ...

Page 199

... Register Descriptions This chapter provides detailed information regarding the registers of the AMD Geode™ CS5535 companion device. The register descriptions are documented at the module- level and briefly summarized below. GeodeLink™ Interface Unit (GLIU) • Standard GeodeLink™ Device (GLD) MSRs: Accessed via RDMSR and WRMSR instructions. • ...

Page 200

... Read from a specific address returns the value of a specific register. Write to the same address different register. W Write. RO Read Only. WO Write Only. R/W1C Read/Write 1 to clear. Writing bit clears Writing 0 has no effect. AMD Geode™ CS5535 Companion Device Data Book Register Descriptions ...

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