MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 789

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor, Inc.
Applications
Figure 9-23 shows an enlarged version of a device shown in Figure 9-22. The TAP is the
interface between the external bus and all internal boundary scan logic. The interface is
comprised of four mandatory signals, TDI, TDO, TCK, TMS, and the optional test reset
(TRST).
The TAP controller is a sequential state machine. The JTAG standard defines operations
that must be performed, others that should be performed, and operations that are optional
and may vary between different devices and vendors. The TAP state machine is stepped by
different combinations of the TMS and TCK signals. Data is shifted in through the TDI pin to
the instruction register, bypass register, or boundary scan register, depending on the state
machine action. The state machine also controls what internal signal path is routed to the
TDO pin.
Although the TAP details are application-specific, the discussion of how to access the TAP
controllers using the QUICC is common to all boards. This access is described in more
detail.
9-69
MC68360 USER’S MANUAL
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