MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 21

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

7.11.7.7.2
7.11.7.8
7.11.7.9
7.11.7.10
7.11.7.10.1 Overrun Error ...................................................................................... 7-281
7.11.7.10.2 Parity Error .......................................................................................... 7-281
7.11.7.10.3 Idle Sequence Receive ....................................................................... 7-281
7.11.7.10.4 Framing Error ...................................................................................... 7-281
7.11.7.10.5 Break Sequence.................................................................................. 7-281
7.11.7.11
7.11.7.12
7.11.7.13
7.11.7.14
7.11.7.15
7.11.8
7.11.9
7.11.10
7.11.10.1
7.11.10.2
7.11.10.3
7.11.10.4
7.11.10.5
7.11.10.6
7.11.10.7
7.11.10.8
7.11.10.8.1 Transmit Commands ........................................................................... 7-297
7.11.10.8.2 Receive Commands ............................................................................ 7-297
7.11.10.9
7.11.10.9.1 Transmission Error (Underrun)............................................................ 7-298
7.11.10.9.2 Reception Error (Overrun)................................................................... 7-298
7.11.10.10
7.11.10.11
7.11.10.12
7.11.10.13
7.11.10.14
7.11.11
7.11.12
7.11.13
7.11.14
7.11.14.1
7.11.14.1.1 SMC Monitor Channel Transmission................................................... 7-306
7.11.14.1.2 SMC Monitor Channel Reception........................................................ 7-307
7.11.14.2
7.11.14.2.1 SMC C/I Channel Transmission .......................................................... 7-307
7.11.14.2.2 SMC C/I Channel Reception ............................................................... 7-307
Paragraph
Number
Receive Commands ............................................................................ 7-280
Send Break (Transmitter) .................................................................... 7-280
Sending a Preamble (Transmitter) ...................................................... 7-280
SMC UART Error-Handling Procedure................................................ 7-281
SMC UART Mode Register (SMCMR) ................................................ 7-281
SMC UART Receive Buffer Descriptor (Rx BD).................................. 7-283
SMC UART Transmit Buffer Descriptor (Tx BD) ................................. 7-286
SMC UART Event Register (SMCE) ................................................... 7-288
SMC UART Mask Register (SMCM) ................................................... 7-290
SMC UART Example........................................................................... 7-290
SMC Interrupt Handling....................................................................... 7-291
SMC as a Transparent Controller........................................................ 7-291
SMC Transparent Controller KEY Features ........................................ 7-291
SMC Transparent Comparison............................................................ 7-292
SMC Transparent Memory Map .......................................................... 7-292
SMC Transparent Transmission Processing....................................... 7-292
SMC Transparent Reception Processing ............................................ 7-293
Using the SMSYNx Pin for Synchronization........................................ 7-293
Using the TSA for Synchronization ..................................................... 7-295
SMC Transparent Command Set ........................................................ 7-297
SMC Transparent Error-Handling Procedure ...................................... 7-298
SMC Transparent Mode Register (SMCMR)....................................... 7-298
SMC Transparent Receive Buffer Descriptor (Rx BD) ........................ 7-299
SMC Transparent Transmit Buffer Descriptor (Tx BD)........................ 7-300
SMC Transparent Event Register (SMCE).......................................... 7-302
SMC Transparent Mask Register (SMCM).......................................... 7-303
SMC Transparent NMSI Example ....................................................... 7-303
SMC Transparent TSA Example ......................................................... 7-304
SMC Interrupt Handling....................................................................... 7-305
SMC as a GCI Controller..................................................................... 7-305
SMC GCI Memory Map ....................................................................... 7-306
SMC C/I Channel Handling ................................................................. 7-307
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
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