MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 39

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

1.5 QUICC SERIAL CONFIGURATIONS
The QUICC offers an extremely flexible set of communications capabilities. Although a full
understanding of the possibilities requires reading the appropriate sections, some of the
possibilities are shown in the following diagrams. They show possible connections between
QUICC devices. In addition, connections are often shown between QUICCs and the
MC68302 to show the compatibility between these devices.
For readability, transceivers are usually omitted in the following diagrams. For local on-
board communications, however, transceivers are often optional and depend on the proto-
col used.
Figure 1-4 shows the Ethernet LAN capability of the QUICC. An external SIA transceiver is
required to complete the interface to the media. This functionality is implemented in the
MC68160 enhanced Ethernet serial transceiver (EEST
Figure 1-3. Larger QUICC System Configuration
MC68360
QUICC
PRTY3–PRTY0
Freescale Semiconductor, Inc.
CAS3–CAS0
WE3–WE0
ADDRESS
For More Information On This Product,
DATA
RAS2
RAS1
WE0
CS0
CS7
OE
R/W
MC68360 USER’S MANUAL
Go to: www.freescale.com
BUFFER
CE (ENABLE)
OE (OUTPUT ENABLE)
WE (WRITE)
DATA
ADDRESS
8-, 16-, OR 32-BIT SRAM
E (ENABLE)
G (OUTPUT ENABLE)
W (WRITE)
DATA
ADDRESS
(FLASH OR REGULAR)
RAS
CAS3–CAS0
W (WRITE)
DATA
ADDRESS
PARITY
). The MC68160 EEST supports
8-BIT BOOT
EPROM
RAS
(OPTIONAL PARITY)
TWO DRAM SIMMs
16- OR 32-BIT
Introduction