MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 689

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

For each DDx bit, the definition is as follows:
7.14.8 Port B Example
PB0 can be configured as a general-purpose I/O pin or as an open-drain pin. It may also be
the receiver reject pin for the SCC1 Ethernet CAM interface (RRJCT1) or the SPI select
input (SPISEL). If the PB0 pin is not configured to connect to the RRJCT signal or the
SPISEL signal, then the SCC and/or SPI receives V
7.14.9 Port C Pin Functions
Port C consists of 12 general-purpose I/O pins with interrupt capability on each pin. Refer to
Table 7-21 for the description of all port C pin options.
0 = General-purpose I/O. The peripheral functions of the pin are not used.
1 = Dedicated peripheral function. The pin is used by the internal module. The on-chip
Signal
PC10
PC11
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
peripheral function to which it is dedicated may be determined by other bits such
as these in the PBDIR.
PCDIR = 1 or PCSO
In the description of the PIP, the PB0 pin, as well as other port B
pins, can also be used as PIP functions. However, the PIP does
not affect the operation of port B unless it is enabled. Therefore,
the PIP description does not need to be studied by users of port
B unless the PIP will be used in the application.
Port C10
Port C11
Port C0
Port C1
Port C2
Port C3
Port C4
Port C5
Port C6
Port C7
Port C8
Port C9
= 0
PCPAR = 0
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 7-21. Port CPin Assignment
PCDIR = 0 and
PCSO = 1
CTS1
CTS2
CTS3
CTS4
MC68360 USER’S MANUAL
CD1
CD2
CD3
CD4
Go to: www.freescale.com
—
—
—
—
NOTE
RTS3/L1RQB
RTS4/L1RQA
L1TSYNCB
L1TSYNCA
PCDIR = 0
RTS1
RTS2
DD
L1RSYNCB
L1RSYNCA
PCPAR = 1
TGATE1
TGATE2
on that signal.
—
—
PCDIR = 1
SDACK2
SDACK1
L1ST1
L1ST2
L1ST3
L1ST4
L1TSYNCB = GND
L1TSYNCA = GND
Input to On-Chip
CTS3 and/or
CTS4 and/or
Peripherals
Parallel I/O Ports
GND
GND
GND
GND
GND
GND
—
—
—
—