MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 50

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Signal Descriptions
2-2
BRGCLK2/L1RCLKB/TOUT3/CLK6/PA13
TIN2/L1TCLKA/BRGO2/CLK3/PA10
TIN1/L1RCLKA/BRGO1/CLK1/PA8
SDACK1/L1TSYNCA/CTS4/PC10
RRJCT2/SPIMOSI(SPITXD)/PB2
BRGO4/SPIMISO(SPIRXD)/PB3
SDACK2/L1TSYNCB/CTS3/PC8
Write enable does not have the capability to follow dynamic bus
sizing with external assertion of DSACK. Write enable will al-
ways follow the port size that is programed in GMR and the OR.
For more information see 6.10 Memory Controller.
L1TCLKB/TOUT4/CLK8/PA15
BRGCLK1/TOUT1/CLK2/PA9
PORT C (INTERRUPT PARALLEL I/O)
L1ST4/L1RQA/RTS4/PB15
L1ST3/L1RQB/RTS3/PB14
L1CLKOA/SMRXD2/PB11
L1CLKOB/SMTXD2/PB10
TIN3/BRGO3/CLK5/PA12
TIN4/BRGO4/CLK7/PA14
L1ST3/L1RQB/RTS3/PC2
L1ST4/L1RQA/RTS4/PC3
TIMERs/SCCs/SIs/CLOCKs/BRG
DONE2/SMRXD1/PB7
DONE1/SMTXD1/PB6
DREQ2/SMSYN1/PB8
STRBO/BRGO3/PB16
DACK2/SMSYN2/PB9
L1RSYNCA/CD4/PC11
STRBI/RSTRT1/PB17
RRJCT1/SPISEL/PB0
RSTRT2/SPICLK/PB1
L1RSYNCB/CD3/PC9
DREQ1/BRGO1/PB4
DACK1/BRGO2/PB5
L1TXDB/RXD3/PA4
L1RXDB/TXD3/PA5
L1TXDA/RXD4/PA6
L1RXDA/TXD4/PA7
TOUT2/CLK4/PA11
L1ST1/RTS1/PB12
L1ST2/RTS2/PB13
TGATE1/CD1/PC5
TGATE2/CD2/PC7
L1ST1/RTS1/PC0
L1ST2/RTS2/PC1
Figure 2-1. QUICC Functional Signal Groups
RXD2/PA2
RXD1/PA0
TXD1/PA1
TXD2/PA3
CTS1/PC4
CTS2/PC6
Freescale Semiconductor, Inc.
For More Information On This Product,
PORT B (PIP)
PORT A
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
MC68360
240 PINS
QUICC
BUS ARBITRATION
SYSTEM CONTROL
INTERRUPT CONTROL
MEMORY CONTROLLER
CLOCK
TEST
ADDRESS BUS
BUS CONTROL
DATA BUS
RESETH
RESETS
FC3/TT0
D31–D16
D15–D0
PRTY1–PRTY0/IOUT1–IOUT2
PRTY2/IOUT0/RQOUT
DSACK0/TBI
DSACK1/TA
DS/TT1
RMC/CONFIG0/LOCK
BG
HALT
BERR/TEA
IRQ4/IOUT1
CS6–CS0/RAS6–RAS0
CS/RAS7/IACK7
FREEZE/CONFIG2/MBARE
IPIPE0/BADD2/DSO
IFETCH/BADD3/DSI
EXTAL
CLKO2–CLKO1
A27–A0
A31–A28/WE3–WE0
FC2–FC0/TM2–TM0
PRTY3/16BM
SIZ0
SIZ1
R/W
OE/AMUX
BR
BGACK/BB
BCLRO/CONFIG1/RAS2DD
PERR
IRQ1/IOUT0/RQOUT
IRQ6/IOUT2
IRQ2,3,5,7
AVEC/IACK5/AVECO
CAS3–CAS0/IACK6,3,2,1
TRIS/TS
BKPT/BKPTO/DSCLK
IPIPE1/RAS1DD/BCLRI
TCK
TMS
TDI
TDO
TRST
XFC
MODCK1–MODCK0
AS
XTAL