MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 457

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

Reception delays are determined by the CD pin as shown in Figure 7-42. If the CDS bit in
GSMR is zero, then the CD pin is sampled on the rising receive clock edge prior to data
being received. If the CDS bit in GSMR is one, then the CD pin transitions cause data to be
immediately gated into the receiver.
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
NOTE: CTSS = 1 in GSMR. CTSP = 0 or no CTS lost can occur.
(INPUT)
NOTE: CTSS = 0 in GSMR. CTSP = 0 or no CTS lost can occur.
(INPUT)
TCLK
TCLK
CTS
CTS
RTS
RTS
TXD
TXD
while the transmit clock is low.
If the CTSS bit in GSMR is set, all CTS transitions must occur
Figure 7-41. CTS Lost in Synchronous Protocols
Freescale Semiconductor, Inc.
FIRST BIT OF FRAME DATA
For More Information On This Product,
FIRST BIT OF FRAME DATA
CTS SAMPLED LOW HERE
MC68360 USER’S MANUAL
Go to: www.freescale.com
NOTE
CTS SAMPLED HIGH HERE
Serial Communication Controllers (SCCs)
CTS LOST SIGNALED IN FRAME BD
CTS LOST SIGNALED IN FRAME BD
DATA FORCED HIGH
RTS FORCED HIGH
DATA FORCED HIGH
RTS FORCED HIGH