MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 711

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

8.3 BOUNDARY SCAN REGISTER
The QUICC scan chain implementation has a 196-bit boundary scan register. This register
contains bits for all device signal and clock pins and associated control signals. The XTAL,
and XFC pins are associated with analog signals and are not included in the boundary scan
register.
All QUICC bidirectional pins have a single register bit in the boundary scan register for pin
data and are controlled by an associated control bit in this register. Twenty-five bits in the
boundary scan register define the output enable signal for associated groups of bidirectional
and three-stateable pins. The control bits and their bit positions are listed in Table 8-1.
1
0
RUN-TEST/IDLE
TEST LOGIC
RESET
0
Figure 8-2. TAP Controller State Machine
Freescale Semiconductor, Inc.
For More Information On This Product,
1
MC68360 USER’S MANUAL
Go to: www.freescale.com
1
SELECT-DR_SCAN
CAPTURE-DR
UPDATE-DR
PAUSE-DR
EXIT2-DR
SHIFT-DR
EXIT1-DR
0
0
1
0
1
1
0
1
1
SELECT-IR_SCAN
Scan Chain Test Access Port
CAPTURE-IR
UPDATE-IR
EXIT2-IR
EXIT1-IR
SHIFT-IR
PAUSE-IR
0
0
0
1
1
1
0
1