MC68EN360AI25VL Freescale, MC68EN360AI25VL Datasheet - Page 469

• Manufacturer Part Number: MC68EN360AI25VL
• Manufacturer: Freescale

Specifications of MC68EN360AI25VL

• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: FQFP
• Lead Free Status / RoHS Status: Compliant

7.10.16.4 UART MEMORY MAP. When configured to operate in UART mode, the QUICC
overlays the structure listed in Table 7-5 with the UART-specific parameters described in
Table 7-7.
MAX_IDL. Once a character is received on the line, the UART controller begins counting any
idle characters received. If a MAX_IDL number of idle characters is received before the next
data character is received, an idle timeout occurs, and the buffer is closed. This in turn can
produce an interrupt request to the CPU32+ core to receive the data from the buffer. Thus,
MAX_IDL provides a convenient way to demarcate frames in the UART mode. To disable
the MAX_IDL feature, simply program it to $0000. A character of idle is calculated as the
following number of bit times: 1 + data length (5, 6, 7, 8, or 9) + 1 (if parity bit is used) +
number of stop bits (1 or 2). Example: for 8 data bits, no parity, and 1 stop bit, the character
length is 10 bits.
NOTE: The boldface items should be initialized by the user.
SCC Base + 30
SCC Base + 34
SCC Base + 38
SCC Base + 3A
SCC Base + 3C
SCC Base + 3E
SCC Base + 40
SCC Base + 42
SCC Base + 44
SCC Base + 46
SCC Base + 48
SCC Base + 4A
SCC Base + 4C
SCC Base + 4E
SCC Base + 50
SCC Base + 52
SCC Base + 54
SCC Base + 56
SCC Base + 58
SCC Base + 5A
SCC Base + 5C
SCC Base + 5E
SCC Base + 60
SCC Base + 62
SCC Base + 64
Address
Freescale Semiconductor, Inc.
Table 7-7. UART-Specific Parameters
For More Information On This Product,
CHARACTER1
CHARACTER2
CHARACTER3
CHARACTER4
CHARACTER5
CHARACTER6
CHARACTER7
CHARACTER8
MAX_IDL
UADDR1
UADDR2
BRKCR
PAREC
FRMEC
NOSEC
BRKEC
TOSEQ
RTEMP
BRKLN
RCCM
RCCR
Name
RLBC
IDLC
RES
RES
MC68360 USER’S MANUAL
Go to: www.freescale.com
Width
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Long
Long
Reserved
Reserved
Maximum idle Characters
Temporary idle Counter
Break Count Register (Transmit)
Receive Parity Error Counter
Receive Framing Error Counter
Receive Noise Counter
Receive Break Condition Counter
Last Received Break Length
UART Address Character 1
UART Address Character 2
Temp Storage
Transmit Out-of-Sequence Character
CONTROL Character 1
CONTROL Character 2
CONTROL Character 3
CONTROL Character 4
CONTROL Character 5
CONTROL Character 6
CONTROL Character 7
CONTROL Character 8
Receive Control Character Mask
Receive Control Character Register
Receive Last Break Character
Serial Communication Controllers (SCCs)
Description