IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 305

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Altera Corporation
January 2011
I/O
Configuration
address bits
23:16 == 0,
(Type 0 transaction)
Configuration
address bits
23:16 > 0
(Type 1 transaction)
Space Indicator
Table 7–12. Address Space Bit Encodings
Table 7–13. Configuration & I/O Space Address Modifications
(Bits 1:0)
Address
Address Space
00
01
10
11
Memory space, 32-bit PCI address.
Address bits 63:32 of the translation table entries are ignored.
Memory space, 64-bit PCI address, dual address cycle (DAC) command will be issued on the
PCI bus. Due to PCI Compiler restrictions, this setting is only possible when a 64-bit PCI data
path is in use. When a 32-bit PCI data path is in use, the hardware will not let this value be set.
I/O space. The address from the translation table process is modified as described in
Table
Configuration space. The address from the translation table process is treated as a type 1
configuration address and is modified as described in
7–13.
●
●
●
●
●
●
●
●
whether the resulting PCI address is a 32- or 64-bit address.
shows the address space field’s format of the address translation table
entries.
If the space indication bits specify configuration or I/O space, subsequent
modifications to the PCI address are performed. Refer to
PCI address bits 2:0 are set to point to the first enabled byte according to the
Avalon byte enables. (Bit 2 only needs to be modified when a 64-bit data path is
in use.)
PCI address bits 31:3 are handled normally.
PCI address bits 1:0 are set to "00" to indicate a type 0 configuration request.
Address bits 10:2 are passed through as normal.
PCI address bits 31:11 are set to be a one-hot encoding of the device number field
of the address bits 15:11.
For example, if the device number shows 0x00, PCI address bit 11 is set to 1 and
bits 31:12 are set to 0. If the device number shows 0x01, PCI address bit 12 is set
to 1 and bits 31:13, 11 are set to 0.
Address bits 31:24 are ignored.
PCI address bits 1:0 are set to "01" to indicate a type 1 configuration request.
Address bits 31:2 are passed through unchanged.
PCI Compiler Version 10.1
Modifications Performed
Description
Table
7–13.
Functional Description
Table
Table 7–12
7–13.
7–37