IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 304

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

PCI Master Operation
Figure 7–10. Avalon-to-PCI Address Translation
7–36
PCI Compiler User Guide
Avalon Address
M-1
High
Control Register Port
High Avalon Address
N
Table Updates via
Bits Index Table
N-1
Low
0
Address Translation Table Size (refer to
page
Avalon-to-PCI address translation table, and the number of bits that are
passed through the transaction table unchanged.
Each entry in the address translation table also has two address space
indication bits, which specify the type of address space being mapped. If
the type of address space being mapped is memory, the bits also indicate
6–16) selections determine both the number of entries in the
N = Number of Pass Through Bits
M = Number of Avalon Address Bits
P = Number of PCI Address Bits
Q = Number of Translation Table Entries
Sp = Space Indication for Each Entry
(Q Entries by P-N Bits wide)
PCI Address Q-1
PCI Address 0
PCI Address 1
PCI Compiler Version 10.1
Avalon to PCI Address
Low Address Bits Unchanged
Translation Table
SpQ-1
Sp0
Sp1
“Avalon Configuration” on
Used as High PCI Address Bits
PCI Address from Table Entry
P-1
PCI Address
High
Space Indication
Altera Corporation
N N-1
January 2011
Low
0