IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 270
IPR-PCI/MT32
Manufacturer Part Number
IPR-PCI/MT32
Description
IP CORE Renewal Of IP-PCI/MT32
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCI/MT32
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Compiler, Master/Target, 32 bit
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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Functional Overview
7–2
PCI Compiler User Guide
This section discusses:
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PCI-Avalon Bridge Blocks
The PCI-Avalon bridge’s blocks provide a feature-rich foundation that
enables the bridge to manage the connectivity for all three PCI
operational modes:
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Depending on the operational mode, the PCI-Avalon bridge uses some or
all of the predefined Avalon-MM ports.
PCI-Avalon bridge block diagram, which includes the following blocks:
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PCI-Avalon bridge module blocks
PCI operational modes
Performance profiles
OpenCore Plus time-out behavior
PCI Target-Only Peripheral
PCI Master/Target Peripheral
PCI Host-Bridge Device
Four predefined Avalon-MM ports
Control/status registers
PCI master controller (when applicable)
PCI target controller
PCI bus arbiter (for Master/Target and Host bridge mode)
Instantiated Altera PCI MegaCore function
PCI Compiler Version 10.1
Figure 7–1
shows a generic
Altera Corporation
January 2011
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