S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 95

LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp

S1D13706F00A200

Manufacturer Part Number
S1D13706F00A200
Description
LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
Manufacturer
Epson
Datasheet

Specifications of S1D13706F00A200

Maximum Clock Frequency
33 MHz
Operating Supply Voltage
1.8 V to 2.2 V, 3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Attached Touch Screen
No
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13706F00A200
Manufacturer:
Epson Electronics America Inc-Semiconductor Div
Quantity:
10 000
Epson Research and Development
Vancouver Design Center
bits 7-2
bits 7-0
bits 7-2
Hardware Functional Specification
Issue Date: 2008/12/16
Look-Up Table Red Write Data Register
REG[0Ah]
Look-Up Table Write Address Register
REG[0Bh]
Look-Up Table Blue Read Data Register
REG[0Ch]
7
7
7
6
6
6
Note
Note
Note
LUT Red Write Data Bits [5:0]
This register contains the data to be written to the red component of the Look-Up Table.
The data is stored in this register until a write to the LUT Write Address register
(REG[0Bh]) moves the data into the Look-Up Table.
LUT Write Address Bits [7:0]
This register forms a pointer into the Look-Up Table (LUT) which is used to write LUT
blue, green, and red data stored in REG[08h], REG[09h], and REG[0Ah]. The data is
updated to the LUT only with the completion of a write to this register. This is a write-
only register and returns 00h if read.
LUT Blue Read Data Bits [5:0]
This register contains the data from the blue component of the Look-Up Table. The LUT
position is controlled by the LUT Read Address Register (REG[0Fh]). This is a read-only
register.
The LUT entry is updated only when the LUT Write Address Register (REG[0Bh]) is
written to.
When a value is written to the LUT Write Address register, the same value is automati-
cally written to the LUT Read Address register (REG[0Fh].
This register is updated only when the LUT Read Address Register (REG[0Fh]) is writ-
ten to.
LUT Blue Read Data Bits 5-0
LUT Red Write Data Bits 5-0
5
5
5
LUT Write Address Bits 7-0
4
4
4
Revision 10.3
3
3
3
2
2
2
1
1
1
n/a
n/a
Read Only
Write Only
Write Only
X31B-A-001-10
S1D13706
0
0
0
Page 95

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