S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 116

• Manufacturer Part Number: S1D13706F00A200
• Description: LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
• Manufacturer: Epson

Specifications of S1D13706F00A200

• Maximum Clock Frequency: 33 MHz
• Operating Supply Voltage: 1.8 V to 2.2 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Attached Touch Screen: No
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Page 116
bits 9-0
S1D13706
X31B-A-001-10
PIP
REG[90h]
PIP
REG[91h]
+
+
Window Y End Position Register 0
Window Y End Position Register 1
7
7
6
6
Note
PIP
These bits determine the Y end position of the PIP
panel. Due to the S1D13706 SwivelView feature, the Y end position may not be a vertical
position value (only true in 0° and 180° SwivelView). For further information on defining
the value of the Y End Position register, see Section 13, “Picture-in-Picture Plus (PIP+)”
on page 140.
The register is also incremented differently based on the SwivelView orientation. For 0°
and 180° SwivelView the Y end position is incremented in 1 line increments. For 90° and
270° SwivelView the Y end position is incremented by y pixels where y is relative to the
current color depth.
Depending on the color depth, some of the higher bits in this register are unused because
the maximum vertical display height is 1024 pixels.
1
(REG[71h] bit 4).
2
and at the next vertical non-display period.
+
These bits have no effect unless the PIP
The effect of REG[84h] through REG[91h] takes place only after REG[91h] is written
Window Y End Position Bits [9:0]
5
5
PIP
n/a
Table 8-14: 32-bit Address Increments for Color Depth
+
Window Y End Position Bits 7-0
4
4
Revision 10.3
Color Depth
16 bpp
1 bpp
2 bpp
4 bpp
8 bpp
3
3
+
Window Enable bit is set to 1
Pixel Increment (y)
+
window in relation to the origin of the
2
2
32
16
8
4
2
Epson Research and Development
Hardware Functional Specification
PIP
+
Window Y End Position
1
1
Vancouver Design Center
Issue Date: 2008/12/16
Bits 9-8
Read/Write
Read/Write
0
0