S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 37

• Manufacturer Part Number: S1D13706F00A200
• Description: LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
• Manufacturer: Epson

Specifications of S1D13706F00A200

• Maximum Clock Frequency: 33 MHz
• Operating Supply Voltage: 1.8 V to 2.2 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Attached Touch Screen: No
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Epson Research and Development
Vancouver Design Center
1. t15 is the delay from when data is placed on the bus until the data is latched into the write buffer.
2. When
3. When
4. When
5. When
Hardware Functional Specification
Issue Date: 2008/12/16
Symbol
T
f
CKIO
CKIO
t9a
t9b
t9c
t9d
t10
t11
t12
t13
t14
t15
t16
t17
t18
t1
t2
t3
t4
t5
t6
t7
t8
Clock frequency
Clock period
Clock pulse width low
Clock pulse width high
A[16:1], M/R#, RD/WR# setup to CKIO
A[16:1], M/R#, RD/WR# hold from CSn#
BS# setup
BS# hold
CSn# setup
CSn# high setup to CKIO
RD# or WEn# asserted for MCLK = BCLK when RDY# is not used
(see Note 2) (max. MCLK = 50MHz)
RD# or WEn# asserted for MCLK = BCLK ÷ 2 when RDY# is not
used (see Note 3)
RD# or WEn# asserted for MCLK = BCLK ÷ 3 when RDY# is not
used (see Note 4)
RD# or WEn# asserted for MCLK = BCLK ÷ 4 when RDY# is not
used (see Note 5)
Falling edge RD# to D[15:0] driven (read cycle)
Falling edge CSn# to RDY# driven high
CKIO to RDY# low
CSn# high to RDY# high
Falling edge CKIO to RDY# high impedance
D[15:0] setup to 2
D[15:0] hold (write cycle)
RDY# falling edge to D[15:0] valid (read cycle)
Rising edge RD# to D[15:0] high impedance (read cycle)
RDY#
RDY#
RDY#
RDY#
is used, the Host will assert RD# or WEn# for up to 8.5T
is used, the Host will assert RD# or WEn# for up to 11.5T
is used, the Host will assert RD# or WEn# for up to 13.5T
is used, the Host will assert RD# or WEn# for up to 18.5T
Note
nd
Minimum one software WAIT state is required.
CKIO after BS# (write cycle) (see note 1)
Parameter
Table 6-7: Hitachi SH-4 Interface Timing
Revision 10.3
1/f
22.5
22.5
11.5
13.5
18.5
Min
8.5
CKIO
CKIO
0
0
3
7
0
0
5
3
5
5
5
1
0
5
CKIO
CKIO
CKIO
2.0V
.
.
.
.
Max
20
24
19
42
35
38
31
0
1/f
11.5
13.5
18.5
Min
6.8
6.8
8.5
CKIO
1
0
1
2
1
2
3
3
4
4
4
0
0
3
3.3V
Max
66
12
12
18
14
14
12
2
X31B-A-001-10
S1D13706
T
T
T
T
Page 37
Unit
MHz
CKIO
CKIO
CKIO
CKIO
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns