S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 119

• Manufacturer Part Number: S1D13706F00A200
• Description: LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
• Manufacturer: Epson

Specifications of S1D13706F00A200

• Maximum Clock Frequency: 33 MHz
• Operating Supply Voltage: 1.8 V to 2.2 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Attached Touch Screen: No
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Epson Research and Development
Vancouver Design Center
8.3.8 General IO Pins Registers
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 7
Hardware Functional Specification
Issue Date: 2008/12/16
General Purpose IO Pins Configuration Register 0
REG[A8h]
General Purpose IO Pins Configuration Register 1
REG[A9h]
Input Enable
GPIO Pin
n/a
7
7
GPIO6 Pin IO
Configuration
6
6
Note
GPIO6 Pin IO Configuration
When this bit = 0 (default), GPIO6 is configured as an input pin.
When this bit = 1, GPIO6 is configured as an output pin.
GPIO5 Pin IO Configuration
When this bit = 0 (default), GPIO5 is configured as an input pin.
When this bit = 1, GPIO5 is configured as an output pin.
GPIO4 Pin IO Configuration
When this bit = 0 (default), GPIO4 is configured as an input pin.
When this bit = 1, GPIO4 is configured as an output pin.
GPIO3 Pin IO Configuration
When this bit = 0 (default), GPIO3 is configured as an input pin.
When this bit = 1, GPIO3 is configured as an output pin.
GPIO2 Pin IO Configuration
When this bit = 0 (default), GPIO2 is configured as an input pin.
When this bit = 1, GPIO2 is configured as an output pin.
GPIO1 Pin IO Configuration
When this bit = 0 (default), GPIO1 is configured as an input pin.
When this bit = 1, GPIO1 is configured as an output pin.
GPIO0 Pin IO Configuration
When this bit = 0 (default), GPIO0 is configured as an input pin.
When this bit = 1, GPIO0 is configured as an output pin.
GPIO Pin Input Enable
This bit is used to enable the input function of the GPIO pins. It must be changed to a 1
after power-on reset to enable the input function of the GPIO pins (default is 0).
1
register has no effect. This case allows the GPIO pins to be used by the HR-TFT/D-TFD
panel interfaces. For a summary of GPIO usage for HR-TFT/D-TFD, see Table 4-9:
“LCD Interface Pin Mapping,” on page 27.
2
If CNF3 = 0 at RESET#, then all GPIO pins are configured as outputs only and this
The input functions of the GPIO pins are not enabled until REG[A9h] bit 7 is set to 1.
GPIO5 Pin IO
Configuration
5
5
GPIO4 Pin IO
Configuration
4
4
Revision 10.3
GPIO3 Pin IO
Configuration
n/a
3
3
GPIO2 Pin IO
Configuration
2
2
GPIO1 Pin IO
Configuration
1
1
GPIO0 Pin IO
Read/Write
Read/Write
Configuration
X31B-A-001-10
S1D13706
0
0
Page 119