S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 110

• Manufacturer Part Number: S1D13706F00A200
• Description: LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
• Manufacturer: Epson

Specifications of S1D13706F00A200

• Maximum Clock Frequency: 33 MHz
• Operating Supply Voltage: 1.8 V to 2.2 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Attached Touch Screen: No
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Page 110
bits 9-0
S1D13706
X31B-A-001-10
Main Window Line Address Offset Register 0
REG[78h]
Main Window Line Address Offset Register 1
REG[79h]
7
7
6
6
Note
Main Window Line Address Offset Bits [9:0]
This register specifies the offset, in DWORDS, from the beginning of one display line to
the beginning of the next display line in the main window. Note that this is a 32-bit
address increment. Calculate the Line Address Offset as follows:
Main Window Line Address Offset bits 9:0
A virtual display can be created by programming this register with a value greater than
the formula requires. When a virtual display is created the image width is larger than the
display width and the displayed image becomes a window into the larger virtual image.
5
5
Main window Line Address Offset Bits 7-0
= display width in pixels ÷ (32 ÷ bpp)
n/a
4
4
Revision 10.3
3
3
2
2
Epson Research and Development
Hardware Functional Specification
Main window Line Address
1
1
Vancouver Design Center
Offset Bits 9-8
Issue Date: 2008/12/16
Read/Write
Read/Write
0
0