S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 120
S1D13706F00A200
Manufacturer Part Number
S1D13706F00A200
Description
LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
Manufacturer
Epson
Datasheet
1.S1D13706F00A200.pdf
(150 pages)
Specifications of S1D13706F00A200
Maximum Clock Frequency
33 MHz
Operating Supply Voltage
1.8 V to 2.2 V, 3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Attached Touch Screen
No
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part Number:
S1D13706F00A200
Manufacturer:
Epson Electronics America Inc-Semiconductor Div
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Page 120
bit 6
bit 5
bit 4
S1D13706
X31B-A-001-10
General Purpose IO Pins Status/Control Register 0
REG[ACh]
n/a
7
GPIO6 Pin IO
Status
6
Note
GPIO6 Pin IO Status
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO6 is configured as an
output, writing a 1 to this bit drives GPIO6 high and writing a 0 to this bit drives GPIO6
low.
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO6 is configured as an
input, a read from this bit returns the status of GPIO6.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11), GPIO6 outputs the YSCLD
signal automatically and writing to this bit has no effect.
GPIO5 Pin IO Status
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO5 is configured as an
output, writing a 1 to this bit drives GPIO5 high and writing a 0 to this bit drives GPIO5
low.
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO5 is configured as an
input, a read from this bit returns the status of GPIO5.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) and a 1 is written to this bit, the
D-TFD signal DD_P1 signal is enabled.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) and a 0 is written to this bit, the
D-TFD signal DD_P1 signal is forced low.
GPIO4 Pin IO Status
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO4 is configured as an
output, writing a 1 to this bit drives GPIO4 high and writing a 0 to this bit drives GPIO4
low.
When a D-TFD panel is not selected (REG[10h] bits 1:0) and GPIO4 is configured as an
input, a read from this bit returns the status of GPIO4.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11), GPIO4 outputs the RES signal
automatically and writing to this bit has no effect.
For information on GPIO pin mapping when HR-TFT/D-TFD panels are selected, see
Table 4-9: “LCD Interface Pin Mapping,” on page 27.
GPIO5 Pin IO
Status
5
GPIO4 Pin IO
Status
4
Revision 10.3
GPIO3 Pin IO
Status
3
GPIO2 Pin IO
Status
2
Epson Research and Development
GPIO1 Pin IO
Hardware Functional Specification
Status
1
Vancouver Design Center
Issue Date: 2008/12/16
Read/Write
GPIO0 Pin IO
Status
0
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