S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 62

• Manufacturer Part Number: S1D13706F00A200
• Description: LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
• Manufacturer: Epson

Specifications of S1D13706F00A200

• Maximum Clock Frequency: 33 MHz
• Operating Supply Voltage: 1.8 V to 2.2 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Attached Touch Screen: No
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Page 62
1. Ts
2. t1
3. t2
4. t3
5. t4
6. t6a
7. t6b
8. t14
S1D13706
X31B-A-001-10
Symbol
t6a
t6b
t7a
t7b
t10
t11
t12
t13
t14
t1
t2
t3
t4
t8
t9
min
min
min
min
min
min
min
Sync Timing
Data Timing
= pixel clock period
= HPS + t4
= t3
= HT
= HPW
= HPS - (HDP + HDPS), if negative add t3
= HPS - (HDP + HDPS) + 2, if negative add t3
= HDPS - (HPS + t4
FPFRAME setup to FPLINE falling edge
FPFRAME hold from FPLINE falling edge
FPLINE period
FPLINE pulse width
FPSHIFT falling edge to FPLINE rising edge
FPSHIFT2 falling edge to FPLINE rising edge
FPSHIFT falling edge to FPLINE falling edge
FPSHIFT2 falling edge to FPLINE falling edge
FPLINE falling edge to FPSHIFT rising, FPSHIFT2 falling edge
FPSHIFT2, FPSHIFT period
FPSHIFT2, FPSHIFT pulse width low
FPSHIFT2, FPSHIFT pulse width high
FPDAT[7:0] setup to FPSHIFT2, FPSHIFT falling edge
FPDAT[7:0] hold from FPSHIFT2, FPSHIFT falling edge
FPLINE falling edge to FPSHIFT rising edge
min
- (HPS + t4
min
FPDAT[7:0]
FPFRAME
FPSHIFT2
FPSHIFT
Figure 6-22: Single Color 8-Bit Panel A.C. Timing (Format 1)
Table 6-20: Single Color 8-Bit Panel A.C. Timing (Format 1)
FPLINE
FPLINE
min
min
)
), if negative add t3
Parameter
Revision 10.3
t6b
t6a
t7b
min
min
t7a
min
t1
t4
t14
t8
t6a + t4
t6b + t4
t12 t13
t14 + 2
note 2
note 3
note 4
note 5
note 6
note 7
note 8
Min
t2
1
4
2
2
1
1
t3
t12 t13
2
Epson Research and Development
t11
Typ
Hardware Functional Specification
t9
t10
Vancouver Design Center
Max
Issue Date: 2008/12/16
6
Ts (note 1)
Units
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts