S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 57

• Manufacturer Part Number: S1D13706F00A200
• Description: LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
• Manufacturer: Epson

Specifications of S1D13706F00A200

• Maximum Clock Frequency: 33 MHz
• Operating Supply Voltage: 1.8 V to 2.2 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Attached Touch Screen: No
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Epson Research and Development
Vancouver Design Center
6.4.3 Single Monochrome 8-Bit Panel Timing
VDP
VNDP
HDP
HNDP
Hardware Functional Specification
Issue Date: 2008/12/16
DRDY (MOD)
DRDY (MOD)
= Vertical Display Period
= (REG[1Dh] bits 1-0, REG[1Ch] bits 7-0) + 1 Lines
= Vertical Non-Display Period
= VT - VDP
= (REG[19h] bits 1-0, REG[18h] bits 7-0) - (REG[1Dh] bits 1-0, REG[1Ch] bits 7-0) Lines
= Horizontal Display Period
= ((REG[14h] bits 6-0) + 1) x 8Ts
= Horizontal Non-Display Period
= HT - HDP
= (((REG[12h] bits 6-0) + 1) x 8Ts) - (((REG[14h] bits 6-0) + 1) x 8Ts)
FPDAT[7:0]
FPFRAME
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
FPSHIFT
FPDAT7
FPDAT6
FPDAT5
FPDAT4
FPDAT3
FPDAT2
FPDAT1
FPDAT0
FPLINE
FPLINE
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Figure 6-17: Single Monochrome 8-Bit Panel Timing
1-1
1-2
1-3
1-4
1-5
1-6
1-7
1-8
LINE1
1-13
1-10
1-11
1-12
1-14
1-15
1-16
1-9
LINE2
Revision 10.3
LINE3
LINE4
VDP
HDP
LINE479 LINE480
VNDP
Invalid
1-633
1-634
1-635
1-636
1-637
1-638
1-639
1-640
HNDP
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
LINE1
LINE2
X31B-A-001-10
S1D13706
Page 57