S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 143

• Manufacturer Part Number: S1D13706F00A200
• Description: LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
• Manufacturer: Epson

Specifications of S1D13706F00A200

• Maximum Clock Frequency: 33 MHz
• Operating Supply Voltage: 1.8 V to 2.2 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-100
• Attached Touch Screen: No
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Epson Research and Development
Vancouver Design Center
14 Big-Endian Bus Interface
14.1 Byte Swapping Bus Data
Hardware Functional Specification
Issue Date: 2008/12/16
The display buffer and register architecture of the S1D13706 is inherently little-endian. If
a host bus interface is configured as big-endian (CNF4 = 1 at reset), bus accesses are
automatically handled by byte swapping all read/write data to/from the internal display
buffer and registers.
Bus data byte swapping translates all byte accesses correctly to the S1D13706 register and
display buffer locations. To maintain the correct translation for 16-bit word access, even
address bytes must be mapped to the MSB of the 16-bit word, and odd address bytes to the
LSB of the 16-bit word. For example:
Byte write 11h to register address 1Eh
Byte write 22h to register address 1Fh
Word write 1122h to register address 1Eh->
Revision 10.3
->
->
REG[1Eh] <= 11h
REG[1Fh] <= 22h
REG[1Eh] <= 11h
REG[1Fh] <= 22h
X31B-A-001-10
S1D13706
Page 143