S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 19

LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp

S1D13706F00A200

Manufacturer Part Number
S1D13706F00A200
Description
LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
Manufacturer
Epson
Datasheet

Specifications of S1D13706F00A200

Maximum Clock Frequency
33 MHz
Operating Supply Voltage
1.8 V to 2.2 V, 3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Attached Touch Screen
No
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13706F00A200
Manufacturer:
Epson Electronics America Inc-Semiconductor Div
Quantity:
10 000
Epson Research and Development
Vancouver Design Center
Hardware Functional Specification
Issue Date: 2008/12/16
Pin Name Type Pin #
DB[15:0]
WE0#
WE1#
M/R#
CS#
IO
I
I
I
I
18-24,
27-35
10
11
6
7
LB2A
Cell
LIS
LIS
LIS
LI
HIOVDD
HIOVDD
HIOVDD
HIOVDD
HIOVDD
Table 4-2: Host Interface Pin Descriptions
Voltage
IO
RESET#
State
Hi-Z
Revision 10.3
Input data from the system data bus.
See Table 4-8: “Host Bus Interface Pin Mapping,” on page 26 for
summary.
This input pin has multiple functions.
See Table 4-8: “Host Bus Interface Pin Mapping,” on page 26 for
summary.
This input pin has multiple functions.
See Table 4-8: “Host Bus Interface Pin Mapping,” on page 26 for
summary.
Chip select input. See Table 4-8: “Host Bus Interface Pin Mapping,”
on page 26 for summary.
This input pin is used to select between the display buffer and
register address spaces of the S1D13706. M/R# is set high to
access the display buffer and low to access the registers. See
Table 4-8: “Host Bus Interface Pin Mapping,” on page 26 for
summary.
• For Generic #1, these pins are connected to D[15:0].
• For Generic #2, these pins are connected to D[15:0].
• For SH-3/SH-4, these pins are connected to D[15:0].
• For MC68K #1, these pins are connected to D[15:0].
• For MC68K #2, these pins are connected to D[31:16] for a 32-
• For REDCAP2, these pins are connected to D[15:0].
• For DragonBall, these pins are connected to D[15:0].
• For Generic #1, this pin inputs the write enable signal for the
• For Generic #2, this pin inputs the write enable signal (WE#)
• For SH-3/SH-4, this pin inputs the write enable signal for data
• For MC68K #1, this pin must be tied to HIO V
• For MC68K #2, this pin inputs the bus size bit 0 (SIZ0).
• For REDCAP2, this pin inputs the byte enable signal for the
• For DragonBall, this pin inputs the byte enable signal for the
• For Generic #1, this pin inputs the write enable signal for the
• For Generic #2, this pin inputs the byte enable signal for the
• For SH-3/SH-4, this pin inputs the write enable signal for data
• For MC68K #1, this pin inputs the upper data strobe (UDS#).
• For MC68K #2, this pin inputs the data strobe (DS#).
• For REDCAP2, this pin inputs the byte enable signal for the
• For DragonBall, this pin inputs the byte enable signal for the
bit device (e.g. MC68030) or D[15:0] for a 16-bit device (e.g.
MC68340).
lower data byte (WE0#).
byte 0 (WE0#).
D[7:0] data byte (EB1).
D[7:0] data byte (LWE).
upper data byte (WE1#).
high data byte (BHE#).
byte 1 (WE1#).
D[15:8] data byte (EB0).
D[15:8] data byte (UWE).
Description
DD
X31B-A-001-10
S1D13706
Page 19

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