S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 29

LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp

S1D13706F00A200

Manufacturer Part Number
S1D13706F00A200
Description
LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
Manufacturer
Epson
Datasheet

Specifications of S1D13706F00A200

Maximum Clock Frequency
33 MHz
Operating Supply Voltage
1.8 V to 2.2 V, 3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Attached Touch Screen
No
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13706F00A200
Manufacturer:
Epson Electronics America Inc-Semiconductor Div
Quantity:
10 000
Epson Research and Development
Vancouver Design Center
6 A.C. Characteristics
6.1 Clock Timing
6.1.1 Input Clocks
Hardware Functional Specification
Issue Date: 2008/12/16
Symbol
T
t
f
t
PWH
OSC
PWL
Clock Input Waveform
OSC
t
t
f
r
Input Clock Frequency (CLKI)
Input Clock period (CLKI)
Input Clock Pulse Width High (CLKI)
Input Clock Pulse Width Low (CLKI)
Input Clock Fall Time (10% - 90%)
Input Clock Rise Time (10% - 90%)
Table 6-1: Clock Input Requirements for CLKI when CLKI to BCLK divide > 1
90%
10%
V
V IL
IH
t r
Note
Conditions:
Maximum internal requirements for clocks derived from CLKI must be considered
when determining the frequency of CLKI. See Section 6.1.2, “Internal Clocks” on page
31 for internal clock requirements.
Parameter
Figure 6-1: Clock Input Requirements
HIO V
NIO V
T
T
C
C
t
PWH
A
rise
L
L
= 50pF (Bus/MPU Interface)
= 0pF (LCD Panel Interface)
= -40° C to 85° C
and T
DD
DD
= 2.0V ± 10% and HIO V
= 3.3V ± 10%
fall
Revision 10.3
for all inputs must be < 5 nsec (10% ~ 90%)
T OSC
t
f
t
PWL
1/f
Min
4.5
4.5
OSC
DD
2.0V
= 3.3V ± 10%
Max
40
5
5
1/f
Min
4.5
4.5
OSC
3.3V
Max
100
5
5
X31B-A-001-10
S1D13706
Units
Page 29
MHz
ns
ns
ns
ns
ns

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