S1D13706F00A200 Epson, S1D13706F00A200 Datasheet - Page 106

LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp

S1D13706F00A200

Manufacturer Part Number
S1D13706F00A200
Description
LCD Drivers (QVGA) 320x240 LCD Controller @ 8bpp
Manufacturer
Epson
Datasheet

Specifications of S1D13706F00A200

Maximum Clock Frequency
33 MHz
Operating Supply Voltage
1.8 V to 2.2 V, 3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Attached Touch Screen
No
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13706F00A200
Manufacturer:
Epson Electronics America Inc-Semiconductor Div
Quantity:
10 000
Page 106
bit 5
bit 4
S1D13706
X31B-A-001-10
Hardware Video
Invert Enable
Note
Note
Note
If Hardware Video Invert is not available (i.e. HR-TFT panel is used), the video invert
function can be controlled by software using REG[70h] bit 4. The following table summa-
rizes the video invert options available.
Hardware Video Invert Enable
This bit allows the Video Invert feature to be controlled using the General Purpose IO pin
GPIO0. This option is not available if configured for a HR-TFT or D-TFD as GPIO0
is used as an LCD control signal by both panels.
When this bit = 0, GPIO0 has no effect on the video data.
When this bit = 1, video data may be inverted via GPIO0.
Software Video Invert
When this bit = 0, video data is normal.
When this bit = 1, video data is inverted.
See Table 8-8: “Inverse Video Mode Select Options”.
The S1D13706 requires some configuration before the hardware video invert feature
can be enabled.
Video data is inverted after the Look-Up Table.
Video data is inverted after the Look-Up Table
• CNF3 must be set to 1 at RESET#
• GPIO Pin Input Enable (REG[A9h] bit 7) must be set to 1
• GPIO0 Pin IO Configuration (REG[A8h] bit 0) must be set to 0
0
0
1
1
Table 8-8: Inverse Video Mode Select Options
Software Video
Invert
X
X
0
1
Revision 10.3
GPIO0
X
X
0
1
Video Data
Normal
Inverse
Normal
Inverse
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2008/12/16

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