R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 91

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.2
Format of this Section: The format used for describing instructions is as shown below.
Format
Shown in assembler
input format. imm and
disp are numeric
values, expressions,
or symbols.
Description
Describes the operation of the instruction.
Notes
Mentions points requiring particular attention when using the instruction.
Operation
Shows the operation of the instruction in C. Provided as a reference to explain the operation of the
instruction. The use of the following resources is assumed here.
unsigned
unsigned
unsigned
unsigned
unsigned
The size of address Addr is returned. A word read from other than a 2n address or a longword read from
other than a 4n address will be detected as an address error.
unsigned
The contents of the register bank entry indicated by the contents of address Addr are returned.
Format of Instruction Descriptions
Instruction Name
Instruction Function
char
short
int
long
double
long
Abstract
Summarizes the
operation.
Read_Byte (unsigned
Read_Word (unsigned
Read_Int
Read_Long (unsigned
Read_Quad (unsigned
Read_Bank_Long (unsigned
Instruction Function (Explanation
of Instruction Name)
(unsigned
Code
Shown in MSB ↔
LSB order.
long
long
long
long
long
Rev. 3.00 Jul 08, 2005 page 75 of 484
long
Section 6 Instruction Descriptions
Addr);
Addr);
Addr);
Addr);
Addr);
Cycles
Value in case
of no-wait
operation.
Addr);
Instruction Type
Instruction Set
Compatibility
REJ09B0051-0300
T Bit
Shows the
value of the T
bit after
execution of
the instruction.