R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 279

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.4.61
Format
SUBC
Description
Subtracts Rm data and the T bit value from general register Rn data, and stores the result in Rn.
The T bit changes according to the result. This instruction is used for subtraction of data that has
more than 32 bits.
Operation
Examples:
SUBC(long m,long n) /* SUBC Rm,Rn */
{
}
CLRT
SUBC
SUBC
unsigned long tmp0,tmp1;
tmp1=R[n]-R[m];
tmp0=R[n];
R[n]=tmp1-T;
if (tmp0<tmp1) T=1;
else T=0;
if (tmp1<R[n]) T=1;
PC+=2;
Rm,Rn
SUBC
Binary Subtraction with Borrow
R3,R1
R2,R0
Rn – Rm– T → Rn, Borrow → T
Abstract
; R0:R1(64 bits) – R2:R3(64 bits) = R0:R1(64 bits)
; Before execution: T = 0, R1 = H'00000000, R3 = H'00000001
; After execution:
; Before execution: T = 1, R0 = H'00000000, R2 = H'00000000
; After execution:
SUBtract with Carry
T = 1, R1 = H'FFFFFFFF
T = 1, R0 = H'FFFFFFFF
Code
0011nnnnmmmm1010 1
Rev. 3.00 Jul 08, 2005 page 263 of 484
Section 6 Instruction Descriptions
Arithmetic Instruction
REJ09B0051-0300
Cycle
T Bit
Borrow