R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 219

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.4.26
Format
LDC
LDC
LDC
LDC.L @Rm+,SR
LDC.L @Rm+,GBR
LDC.L @Rm+,VBR
Description
Store the source operand into control register SR, GBR, or VBR.
Operation
LDCSR(long m)
{
}
LDCGBR(long m)
{
}
LDCVBR(long m)
{
}
LDCMSR(long m)
{
SR=R[m]&0x000063F3;
PC+=2;
GBR=R[m];
PC+=2;
VBR=R[m];
PC+=2;
SR=Read_Long(R[m])&0x000063F3;
Rm,SR
Rm,GBR
Rm,VBR
LDC
Load to Control
Register
/* LDC Rm,SR */
/* LDC Rm,GBR */
/* LDC Rm,VBR */
/* LDC.L @Rm+,SR */
Abstract
Rm → SR
Rm → GBR
Rm → VBR
(Rm) → SR, Rm + 4 → Rm
(Rm) → GBR, Rm + 4 → Rm
(Rm) → VBR, Rm + 4 → Rm
LoaD to Control register
Rev. 3.00 Jul 08, 2005 page 203 of 484
Code
0100mmmm00001110 3
0100mmmm00011110 1
0100mmmm00101110 1
0100mmmm00000111 5
0100mmmm00010111 1
0100mmmm00100111 1
Section 6 Instruction Descriptions
System Control Instruction
REJ09B0051-0300
Cycle T Bit
LSB
—
—
LSB
—
—