R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 270

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Instruction Descriptions
6.4.55
Format
SHLR
Description
Logically shifts the contents of general register Rn to the right by one bit, and stores the result in
Rn. The bit that is shifted out of the operand is transferred to the T bit (figure 6.11).
Operation
Examples:
Rev. 3.00 Jul 08, 2005 page 254 of 484
REJ09B0051-0300
SHLR(long n) /* SHLR Rn */
{
}
SHLR
if ((R[n]&0x00000001)==0) T=0;
else T=1;
R[n]>>=1;
R[n]&=0x7FFFFFFF;
PC+=2;
Rn
SHLR
One-Bit Right
Logical Shift
R0
Abstract
0 → Rn → T
; Before execution:
; After execution:
SHLR
SHift Logical Right
Figure 6.11 Shift Logical Right
0
MSB
R0 = H'80000001, T = 0
R0 = H'40000000, T = 1
Code
0100nnnn00000001
LSB
Shift Instruction
T
Cycle
1
T Bit
LSB