R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 405

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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(10) PREF Instruction
Instruction Type
Pipeline
Operation
The pipeline ends after four stages: IF, ID, EX, MA. There is no WB stage as there is no return of
data to the register.
Instruction Issuance
This instruction uses the memory access pipeline.
Parallel Execution Capability
No particular comments
Instruction A
Next instruction
Instruction after next
PREF
@Rm
↔ ↔ ↔ ↔ ↔ Slots
IF
IF
ID
ID
IF
EX
EX
ID
MA
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
EX
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
Rev. 3.00 Jul 08, 2005 page 389 of 484
Section 8 Pipeline Operation
REJ09B0051-0300

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