UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 73

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UPD70F3763GC-UEU-AX

Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet

Specifications of UPD70F3763GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(2) Data space
With the V850ES/JG3-U and V850ES/JH3-U, it seems that there are sixty-four 64 MB address spaces on the 4 GB
CPU address space. Therefore, the least significant bit (bit 25) of a 26-bit address is sign-extended to 32 bits and
allocated as an address.
(a) Application example of wraparound
If R = r0 (zero register) is specified for the LD/ST disp16 [R] instruction, a range of addresses 00000000H ±32
KB can be addressed by sign-extended disp16. All the resources, including the internal hardware, can be
addressed by one pointer.
The zero register (r0) is a register fixed to 0 by hardware, and practically eliminates the need for registers
dedicated to pointers.
Example:
μ
PD70F3769
(R = )
0 0 0 7 F F F F H
0 0 0 0 7 F F F H
0 0 0 0 0 0 0 0 H
F F F F F 0 0 0 H
F F F F E F F F H
F F F F 8 0 0 0 H
F F F F 3 0 0 0 H
Internal ROM area
On-chip peripheral
Internal RAM area
I/O area
32 KB
4 KB
28 KB
CHAPTER 3 CPU FUNCTION
Page 73 of 1408

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