UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 708
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-U, V850ES/JH3-U
15.6 Cautions
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) When A/D converter is not used
(2) Input range of ANI0 to ANI11 pins
(3) Countermeasures against noise
(4) Alternate I/O
When the A/D converter is not used, the power consumption can be reduced by clearing the ADA0M0.ADA0CE bit
to 0.
Input the voltage within the specified range to the ANI0 to ANI11 pins. If a voltage equal to or higher than AV
equal to or lower than AV
the conversion value of that channel is undefined, and the conversion value of the other channels may also be
affected.
To maintain the 10-bit resolution, the ANI0 to ANI11 pins must be effectively protected from noise. The effect of
noise increases as the output impedance of the analog input source becomes higher. To lower the noise,
connecting an external capacitor as shown in Figure 15-12 is recommended.
The analog input pins (ANI0 to ANI11) function alternately as port pins. When selecting one of the ANI0 to ANI11
pins to execute A/D conversion, do not execute an instruction to read an input port or write to an output port during
conversion as the conversion resolution may drop.
Also the conversion resolution may drop at the pins set as output port pins during A/D conversion if the output
current fluctuates due to the effect of the external circuit connected to the port pins.
If a digital pulse is applied to a pin adjacent to the pin whose input signal is being converted, the A/D conversion
value may not be as expected due to the effect of coupling noise. Therefore, do not apply a pulse to a pin adjacent
to the pin undergoing A/D conversion.
SS
(even within the range of the absolute maximum ratings) is input to any of these pins,
Figure 15-12. Processing of Analog Input Pin
Clamp with a diode with a low V
if noise equal to or higher than AV
to or lower than AV
ANI0 to ANI11
V
AV
AV
V
DD
SS
REF0
SS
SS
may be generated.
CHAPTER 15 A/D CONVERTER
F
(0.3 V or less)
REF0
or equal
Page 708 of 1408
REF0
or
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