UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 165
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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P93
P94
P95
P96
P97
P98
Pin Name
Notes 1. V850ES/JH3-U only
2. When using as the A0 to A15 pins, be sure to set all 16 bits of the PMC9 register to FFFFH at once.
TECR0
TIT00
TOT00
A3
TIAA31
TOAA31
TENC00
EVTT0
A4
TIAA30
TOAA30
A5
TIAA21
TOAA21
INTP11
A6
SIF1
TIAA20
TOAA20
A7
SOF1
INTP12
A8
Alternate Function
Name
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Input
Input
Output
Output
Input
Output
Input
Input
Output
Input
Output
Output
Input
Output
Input
Output
Input
Input
Output
Output
Output
Input
Output
I/O
P93 = Setting not required
P93 = Setting not required
P93 = Setting not required
P93 = Setting not required
P94 = Setting not required
P94 = Setting not required
P94 = Setting not required
P94 = Setting not required
P94 = Setting not required
P95 = Setting not required
P95 = Setting not required
P95 = Setting not required
P96 = Setting not required
P96 = Setting not required
P96 = Setting not required
P96 = Setting not required
P97 = Setting not required
P97 = Setting not required
P97 = Setting not required
P97 = Setting not required
P98 = Setting not required
P98 = Setting not required
P98 = Setting not required
Pn Register
Pnx Bit of
PM93 = Setting not required PMC93 = 1
PM93 = Setting not required PMC93 = 1
PM93 = Setting not required PMC93 = 1
PM93 = Setting not required PMC93 = 1
PM94 = Setting not required PMC94 = 1
PM94 = Setting not required PMC94 = 1
PM94 = Setting not required PMC94 = 1
PM94 = Setting not required PMC94 = 1
PM94 = Setting not required PMC94 = 1
PM95 = Setting not required PMC95 = 1
PM95 = Setting not required PMC95 = 1
PM95 = Setting not required PMC95 = 1
PM96 = Setting not required PMC96 = 1
PM96 = Setting not required PMC96 = 1
PM96 = Setting not required PMC96 = 1
PM96 = Setting not required PMC96 = 1
PM97 = Setting not required PMC97 = 1
PM97 = Setting not required PMC97 = 1
PM97 = Setting not required PMC97 = 1
PM97 = Setting not required PMC97 = 1
PM98 = Setting not required PMC98 = 1
PM98 = Setting not required PMC98 = 1
PM98 = Setting not required PMC98 = 1
Table 4-20. Using Port Pin as Alternate-Function Pin (7/10)
PMn Register
PMnx Bit of
PMCn Register
PMCnx Bit of
PFCE93 = 0
PFCE93 = 0
PFCE93 = 1
PFCE93 = 1
PFCE94 = 0
PFCE94 = 0
PFCE94 = 1
PFCE94 = 1
PFCE94 = 1
PFCE95 = 0
PFCE95 = 0
PFCE95 = 1
PFCE96 = 0
PFCE96 = 1
PFCE96 = 1
PFCE96 = 1
PFCE97 = 0
PFCE97 = 0
PFCE97 = 1
PFCE97 = 1
PFCE98 = 0
PFCE98 = 0
PFCE98 = 1
PFCEn Register
PFCEnx Bit of
PFC93 = 0
PFC93 = 1
PFC93 = 0
PFC93 = 1
PFC94 = 0
PFC94 = 1
PFC94 = 0
PFC94 = 0
PFC94 = 1
PFC95 = 0
PFC95 = 1
PFC95 = 0
PFC96 = 0
PFC96 = 1
PFC96 = 0
PFC96 = 1
PFC97 = 0
PFC97 = 1
PFC97 = 0
PFC97 = 1
PFC98 = 0
PFC98 = 1
PFC98 = 0
PFCn Register
PFCnx Bit of
<R>
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
(Registers)
Other Bits
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