UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 554
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 554 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Encoder clear input
(TENC00 pin input)
(TENC01 pin input)
INTTT0CC0 signal
INTTT0CC1 signal
INTTT0CC0 signal
Figure 9-54. Operation Example (When TT0SCE Bit = 1, TT0ZCL Bit = 1, TT0BCL Bit = 0, TT0ACL Bit = 1, TT0UDS1 and
TT0CCR0 register
TT0CCR1 register
TT0CCR0 register
(TECR0 pin input)
(i) If inputting the high level to the TECR0 pin lags behind inputting the low level to the TENC01 pin
TT0CNT register
Peripheral clock
Encoder input
Encoder input
Count timing
Clear signal
while the counter is counting up, the counter is cleared after it counts up.
signal
TT0UDS0 Bits = 11, TECR0 = High Level, TENC01 = Low Level, and TENC00 = High Level) (1/3)
Compare match interrupt request signal is not generated.
N
0000H (when TT0CCR1 register is set to 0000H)
N + 1
N + 1 (when TT0CCR0 register is set to N + 1)
N (when TT0CCR0 register is set to N)
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
H
L
H
0000H
Page 554 of 1408
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