UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 527
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 527 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(2) Operation timing in free-running timer mode
(a) Interval operation with compare register
When 16-bit timer/event counter T is used as an interval timer with the TT0CCRn register used as a compare
register, software processing is necessary for setting a comparison value to generate the next interrupt request
signal each time the INTTT0CCn signal has been detected.
When performing an interval operation in the free-running timer mode, two intervals can be set with one
channel.
To perform the interval operation, the value of the corresponding TT0CCRn register must be re-set in the
interrupt servicing that is executed when the INTTT0CCn signal is detected.
The set value for re-setting the TT0CCRn register can be calculated by the following expression, where “D
the interval period.
INTTT0CC0 signal
INTTT0CC1 signal
TT0CCR0 register
TT0CCR1 register
Compare register default value: D
Value set to compare register second and subsequent time: Previous set value + D
(If the calculation result is greater than FFFFH, subtract 10000H from the result and set this value to the
register.)
TOT01 pin output
TOT00 pin output
16-bit counter
TT0CE bit
FFFFH
0000H
Interval period
Interval period
D
(D
(D
00
00
D
10
+ 1)
D
10
a
+ 1)
D
00
− 1
10
Interval period
(10000H +
D
01
Interval period
− D
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
(10000H +
D
D
D
00
11
)
01
01
− D
D
Interval period
10
D
11
(D
)
11
02
− D
D
Interval period
02
01
D
(10000H +
)
D
02
12
Interval period
− D
(10000H +
D
D
D
11
03
12
)
12
− D
D
03
02
D
)
Interval period
03
(10000H +
D
Interval period
13
(10000H +
D
− D
04
D
− D
12
D
13
)
D
13
03
04
)
D
a
04
D
D
14
05
Page 527 of 1408
a
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