UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 450
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 450 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Caution Be sure to set bits 3 to 7 to “0”.
Reset (0)
TT0EOF
• The TT0EOF bit is set to 1 when the 16-bit counter overflows from FFFFH to
• As soon as the TT0EOF bit has been set to 1, an overflow interrupt request signal
• The TT0EOF bit is not cleared to 0 even if the TT0EOF bit or TT0OPT1 register
• The status of the TT0EOF bit is retained even if the TT0CTL0.TT0CE bit is cleared
• Before clearing the TT0EOF bit to 0 after the INTTTOV0 signal is generated, be
• The TT0EOF bit can be read or written, but it cannot be set to 1 by software.
• This bit is cleared to 0 if the TT0CTL0.TT0CE bit = 0 when the
• The status of the TT0ESF bit is retained even if the TT0CE bit = 0 when the
TT0ESF
Set (1)
0000H in the encoder compare mode.
(INTTTOV0) is generated. At this time, the TT0OPT0.TT0OVF bit is not set to 1.
is read when the TT0EOF bit = 1.
to 0 when the TT0CTL2.TT0ECC bit = 1.
sure to confirm (read) that the TT0EOF bit is set to 1.
Writing 1 to this bit does not affect the operation of TMT0.
TT0CTL2.TT0ECC bit = 0.
TT0ECC bit = 1.
0
1
Overflow occurs.
Cleared by writing 0 to the
bit = 0
TMT0 is counting up.
TMT0 is counting down.
TMT0 count-up/-down operation status detection flag
Overflow detection flag for TMT0 encoder function
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
TT0EOF
bit or when the
TT0CTL0.TT0CE
Page 450 of 1408
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