UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 400

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UPD70F3763GC-UEU-AX

Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet

Specifications of UPD70F3763GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(c) Generation timing of compare match interrupt request signal (INTTABnCCk)
CCRk buffer register
INTTABnCCk signal
The timing of generation of the INTTABnCCk signal in the PWM output mode differs from the timing of other
INTTABnCCk signals; the INTTABnCCk signal is generated when the count value of the 16-bit counter matches
the value of the TABnCCRk register.
Remark
Usually, the INTTABnCCk signal is generated in synchronization with the next counting up after the count value
of the 16-bit counter matches the value of the TABnCCRk register.
In the PWM output mode, however, it is generated one clock earlier. This is because the timing is changed to
match the change timing of the output signal of the TOABnk pin.
TOABnk pin output
16-bit counter
Count clock
k = 1 to 3,
n = 0, 1
D
k
− 2
D
k
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
− 1
D
D
k
k
D
k
+ 1
D
k
+ 2
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