UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 1134
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 1134 of 1411
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V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(17) HcPeriodicStart register (Offset 40H)
(18) HcLSThreshold register (Offset 44H)
31 to 12
11 to 0
31 to 14
13 to 0
Bit position
Bit position
After reset: 0000 0000H
After reset: 0000 0628H
HcLSThres-
PeriodicStart
[13:0]
hold[11:0]
Bit name
Bit name
−
−
Reserved. (Be sure to write “0” to these bits.)
Used to determine the transfer ratio of periodic and async lists in a PeriodicStart field
frame.
This field must be set by the host controller driver (HCD) during initialization of the OHCI
host controller.
If the value of the FR field is larger than the value set to this field, the non-periodic list takes
precedence over the periodic list.
The OHCI Specification recommends setting this value to about 10% of the FI field value,
and the relevant value is 3E67H.
HcLSThres
-hold7
Reserved. (Be sure to write “0” to these bits.)
Specifies the threshold value for whether transfer is available for the remaining time of
frames during LS transfer.
If the FR field value is larger than the value set to this field, LS transfer can be started.
Periodic
Start7
31
15
31
15
23
23
0
0
0
7
0
0
0
7
R/W
R/W
HcLSThres
-hold6
Periodic
Start6
30
22
14
30
22
14
0
0
0
6
0
0
6
0
HcLSThres
-hold5
Periodic
Periodic
Start13
Start5
29
21
13
29
21
13
5
0
0
0
0
0
5
HcLSThres
-hold4
Periodic
Periodic
Start12
Start4
28
12
28
12
20
20
0
0
4
0
0
0
4
CHAPTER 21 USB HOST CONTROLLER (USBH)
Function
Function
HcLSThres
-hold11
HcLSThres
-hold3
Periodic
Periodic
Start11
Start3
27
19
11
27
19
11
0
0
3
0
0
3
HcLSThres
-hold10
HcLSThres
-hold2
Periodic
Periodic
Start10
Start2
26
18
10
26
18
10
0
0
2
0
0
2
HcLSThres
-hold9
HcLSThres
-hold1
Periodic
Periodic
Start9
Start1
25
17
25
17
9
1
9
1
0
0
0
0
HcLSThres
-hold8
HcLSThres
-hold0
Periodic
Periodic
Start8
Start0
24
16
24
16
0
0
8
0
0
0
8
0
Page 1134 of 1408
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