UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 467
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 467 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Notes 1. Because the TT0CCR1 register was not rewritten, D
Remarks 1. D
CCR0 buffer register
CCR1 buffer register
INTTT0CC0 signal
INTTT0CC1 signal
TT0CCR0 register
TT0CCR1 register
TOT00 pin output
TOT01 pin output
2. Because the TT0CCR1 register has been written (D
3. Because the TT0CCR1 register has been written (D
16-bit counter
2. The above timing chart illustrates the operation in the PWM output mode as an example.
buffer register upon a match between the value of the 16-bit counter and the value of the
TT0CCR0 register (D
buffer register upon a match between the value of the 16-bit counter and the value of the
TT0CCR0 register (D
FFFFH
0000H
D
01
11
, D
, D
12
TT0CE bit = 1
02
0000H
0000H
, D
:
03
: Set values of TT0CCR0 register
D
Set values of TT0CCR1 register
D
01
11
Figure 9-6. Timing of Batch Write
01
02
).
).
D
D
D
01
11
11
D
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
01
Note 2
D
02
D
12
D
12
Note 1
Note 1
D
02
D
D
02
12
D
12
03
Note 3
is not transferred.
Same value write
12
12
D
), data is transferred to the CCR1
), data is transferred to the CCR1
02
D
D
03
12
D
12
Note 1
Note 1
D
03
D
D
12
03
D
12
Page 467 of 1408
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