UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 558

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UPD70F3763GC-UEU-AX

Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet

Specifications of UPD70F3763GC-UEU-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
INTTT0OV signal
TT0TCW register
TT0CNT register
Peripheral clock
up/down signal
(b) If overflow does not occur immediately after start of operation
timing signal
Count clock
TT0ECC bit
TT0EOF bit
TT0CE bit
If the count operation is resumed when the TT0CTL2.TT0ECC bit = 1, the 16-bit counter does not overflow if its
count value that has been held is FFFFH and if the next count operation is counting up.
After the counter starts operating and counts up from a count value (value of TT0TCW register = FFFFH), the
counter overflows from FFFFH to 0000H. However, detection of the overflow is masked, the overflow flag
(TT0EOF) is not set, and the overflow interrupt request signal (INTTT0OV) is not generated.
Count
Count
H
L = Count up
FFFFH
Hold
TT0TCW = FFFFH
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
FFFFH
0000H
Overflow does
not occur.
Page 558 of 1408

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