UPD70F3763GC-UEU-AX Renesas Electronics America, UPD70F3763GC-UEU-AX Datasheet - Page 481
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UPD70F3763GC-UEU-AX
Manufacturer Part Number
UPD70F3763GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-U 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3763GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
75
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3763GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(f) TMT0 capture/compare register 1 (TT0CCR1)
The TT0CCR1 register is not used in the external event count mode. However, the set value of the
TT0CCR1 register is transferred to the CCR1 buffer register. When the count value of the 16-bit counter
matches the value of the CCR1 buffer register, a compare match interrupt request signal (INTTT0CC1) is
generated.
When the TT0CCR1 register is not used, it is recommended to set its value to FFFFH. Also mask the
register by the interrupt mask flag (TT0CCIC1.TT0CCMK1).
Remark
Figure 9-16. Register Setting for Operation in External Event Count Mode (2/2)
TMT0 control register 2 (TT0CTL2), TMT0 I/O control register 0 (TT0IOC0), TMT0 I/O control
register 1 (TT0IOC1), TMT0 I/O control register 3 (TT0IOC3), TMT0 option register 0
(TT0OPT0), TMT0 option register 1 (TT0OPT1), and TMT0 counter write register (TT0TCW) are
not used in the external event count mode.
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
Page 481 of 1408
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